嵌入式系统架构软体设计课件.ppt

1、嵌入式系统架构软体设计嵌入式系统架构软体设计 -using ARMDay#3,#4,#5 Modules Outline嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM课程介绍课程介绍q Day#3 Simple RISC Assembly Language ARM Assembly Language ARM Development Suite 使用练习q Day#4 Arm Instruction set Important ASM Programming Skills ARM/THUMB/C Interworkingq Day#5 ARM Exception Handler

2、 Build ARM ROM Image Use NET-Start!ucLinux BSP嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM嵌入式系统产品设计流程概观嵌入式系统产品设计流程概观嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMq ARM system-on-chip Architecture,2nd ed.q ARM architecture reference manual,2nd ed.q ARM Development Suite-Getting Startedq ARM Development Suite-Developer Guideq

3、ARM Development Suite-Assembler Guideq uclinux.org/q 2019嵌入式系统开发经验q Building powerful platform with Windows CEq Software Engineering,A practitioners Approach 3rd ed.q Professional Symbian Programming嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM嵌入式系统架构软体设计 -using ARMModule#3-1:Simple RISC Assembly Concept嵌入式系统架构软

4、体设计嵌入式系统架构软体设计-using ARMRISC精简指令集精简指令集vs.CISC复杂指令集复杂指令集Hardware instruction decode logicPipeline executionSingle executionLarge microcode ROMs to decode instructionAllow little pipelineMany cycles to completer a single instructionA smaller die sizeA shorter development timeA higher performance Poor

5、code densityClockFetchDecodeRegisterALUMEMWriteFetchDecodeRegisterALUMEMWriteFetchDecodeRegisterALUMEMWriteRISC(e.g.ARM)CISC(e.g.x86)FetchDecodeRegisterALUMEMWrite嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMMUO 一个简单的处理器一个简单的处理器PCIRACCMEMControlALUAddress busData bus硬体单元功能PCProgram CounterACCAccumulatorALUArithm

6、etic logic unitIRInstruction register嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMMUO指令集与资料路径指令集与资料路径指令Opcode功能LDA S0000ACC=memSSTO S0001memS=ACCADD S0010ACC=ACC+memSSUB S0011ACC=ACC-memSJMP S0100PC=SJGE S0101If ACC=PC=SJNE S0110If ACC!=0 PC=SSTP 0111stopOpcodeS4 bits12 bits指令规则PCIRACCMEMControlALUAddress busDat

7、a bus嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM指令执行范例指令执行范例PCIRACCMEMControlALUAddress busData busqADD 0 x16AACC:=ACC+mem0 x16A嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM运算范例运算范例C function:Main()C=A+B;MUO 机器指令LDA 0 x100ADD 0 x104STO 0 x108指令Opcode功能LDA S0000ACC=memSSTO S0001memS=ACCADD S0010ACC=ACC+memSSUB S0011ACC=ACC-

8、memSJMP S0100PC=SJGE S0101If ACC=PC=SJNE S0110If ACC!=0 PC=SSTP 0111stopPCIRACCMEMControlALUAddress busData bus0 x100ABC0 x1040 x108嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM练习：练习：MUO微处理器的运算微处理器的运算0 x100 LDA 0 x1000 x002 SUB 0 x1040 x004 STO 0 x1000 x006 JNE 0 x0000 x008 STP请描述此段程式的动作，暂存器值的变化、与资料流。请用C语言来写出这段程

9、式码。PCIRACCMEMControlALUAddress busData bus0 x0001113140 x0020 x0040 x00610100120 x1080 x1040 x100指令Opcode功能LDA S0000ACC=memSSTO S0001memS=ACCADD S0010ACC=ACC+memSSUB S0011ACC=ACC-memSJMP S0100PC=SJGE S0101If ACC=PC=SJNE S0110If ACC!=0 PC=SSTP 0111stop嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM嵌入式系统架构软体设计 -usin

10、g ARMModule#3-2:ARM Assembly Language嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMARM7TDMI资料流资料流e.g.r3:=r4+(r4,2)ADD r3,r4,r4,LSL#2 A bus B busAddress RegisterRegister BankMultiplierBarrelShifter32 Bit ALUDecode Stage instruction DecompressionRead DataRigisterWrite DateRegisterIntroductionDecoderandControlLogicB

11、BUSABUSALUBUSAdress IncrementerincrementerABEPCA31:0PC UpdateDBED31:0BIGENOMCLKnWAITnRWMAS1:0ISYNCnIRQnFIQnRESETABORTnTRANSnMREQSEQLOCKnM4:0nOPCnCPICPACPB嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMARM 的暂存器的暂存器q30 general-purpose,32 bits registersq1 Program Counter(PC)q1 Current Program Status Register(CPSR)q5

12、Saved Program Status Registers(SPSR)User mode FIQ mode irq mode SVC mode abort mode undefined mode嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMProgram Status Registerq CPSR:Currrent Program Status Regiterq SPSR:Saved Program Status Registerq Condition code flags -N:Negative rsult from ALU -Z:Zero result from ALU

13、 -C:ALU operation Carried out -V:ALU operation overflowedq Inerrupt Disable bits-I:disable the IRQ-F:Disable the FIQq T bit-Architechture xT only-T=0:ARM state-T=1:Thumb stateq Q:Stickly Overflow flag-Architecture 5TE only-QADD,QSUBqJ:Processor in Jazelle stateArchitecture 5TEJ onlyqMode bitsSpecify

14、 the processor mode10000 User10001 FIQ10010 IRQ10011 SVC10111 Abort11011 Undef11111 System31 30 29 28 27 24 7 6 5 4 0N Z C V Q J undefined I F T mode嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMProgram counter R15q ARM state:All ARM instructions are four bytes long(one 32-bit word)and are always aligned on a wor

15、d boundary.The PC value is stored in bits 31:2 with bits 1:0 undefined.q In Thumb state:All instructions are 16 bits wide,and halfword aligned The PC value is stored in bits31:1 with bits 0 undefined.q In Jazelle state:All instructions are 8 bits wide.The processor performs a word access to read 4 i

16、nstructions at once.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMLink Register R14q Register 14 is the Link Register(LR).q This register holds the address of the next instruction after a Branch and Link(BL)instruction,which is the instruction used to make a subroutine call.q At all other times,R14 can be used as

17、 a general-purpose register嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMOther Register R0-R13q The remaining 15 registers have no special hardware purpose.q Their uses are defined purely by software.q By convention,ARM assembly language use R13 as Stack Pointer.q C and C+compilers always use R14 as the Stack Poi

18、nter(SP)嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMStructure of ARM Assembly Language ModuleAREA Sectionname,attr,attrStart of New code or data section.CODE:contain machine instructions.READONLY:section should not be written to.Other attr:DATA,NOINIT,READWRITE,Declares an entry point to a program.Labels.Declar

19、es the end of the source file.AREA ARMex,CODE,READONLY ;C:ARMADSv1_2Exampleasmarmex.s ;MOV r0,#10MOV r1,#3ADD r0,r0,r1MOV r0,#0 x18LDR r1,=0 x20026SWI0 x123456ENTRYstartstopEND嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMCalling Subroutines Uses BLq BL destination destination is the label on the first instructio

20、n of the subroutine.BL does:place the return address in the link register(R14)sets PC to the address of the subroutine.In the subroutine we can use“MOV pc,lr”to return.By convention,R0-R3 are used to pass parameters.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMCalling Subroutines Example ;C:ARMADSv1_2Exampleasms

21、ubrout.s ;AREA subrout,CODE,READONLYENTRY startMOVr0,#10MOVr1,#3BLdoaddMOVr0,#0 x18LDRr1,=0 x20026SWI0 x123456stopdoadd ADD r0,r0,r1MOV pc,lrEND;name this block of code;mark first instruction;to execute;Set up parameters;Call subroutine;angel_SWI reason_report Exception;ADP_Stopped_ApplicationExit;A

22、RM semihosting SWI;Subroutine code;Return from subroutine.;Mark end of file嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMConstant Data Typesq Numbers Numeric constants are accepted in three forms:Decimal,for example,123 Hexadecimal,for example,0 x7B n_XXX where:n is as base between 2 and 9 xxx is a number in that

23、 base.q Boolean TRUE and FALSE must be written as TRUE and FALSE.q Characters constants consist of opening and closing single quotes X,enclosing either a single character or an escaped character,using the standard C escape characters.q Strings consist of opening and closing double quotes“XXXX”.If do

24、uble quotes or dollar signs are used within a string as literal text characters,they must be represented by a pair of the appropriate character.For example,you must use$if you require a single$in the string.The standard C escape sequences can be used within string constants.嵌入式系统架构软体设计嵌入式系统架构软体设计-us

25、ing ARMq Almost all ARM instructions can be conditionally executed.e.g.ADDS r0,r1,r2ADDEQ r0,r1,r2q Execute if the N,Z,C and V flags in the CPSR satisfy a condition specified in the instruction,otherwise,NOP.Conditional ARM Instructions指令名称条件XXXCC嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMq Almost every ARM in

26、struction can be executed conditionally on the state of the ALU state flags in the CPSR.q Add an S suffix to an ARM data processing instruction to make it update the ALU state flags in the CPSR E.g.ADDS r0,r1,r2;r0=r1+r2 and update ALU status in CPSR.q In ARM state,you can:update the ALU status flag

27、s in the PSR on the result of a data operation execute several other data operation without updating the flags execute following instructions or not,according to the state of the flags updated in the first operation.q In Thumb state most data operations always update the flags and conditional execut

28、ion can only be achieved using the conditional branch instruction(B).q Do not use the S suffix with CMP,CMN,TST,or TEQ.These comparison instructions always update the flagConditional Execution嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMALU Status Register in CPSRq N Set when the result of the operation was Nega

29、tive.q Z Set when the result of the operation was Zero.q C when the result of the operation was Carry.A carry occurs if the result of an addition is greater than or equal to 232 If the result of a instruction is positive,or as the result of an inline barrel shifter operation in a move or logical ins

30、truction.q V Set when the operation caused oVerflow.Overflow occurs if the result of an add,subtract,or compare is greater than or equal to 231,or less than 231.q Q ARM architecture v5Eonly.Sticky flag.Used to detect saturation in special saturating arithmetic instructions(e.g.QAD,ASUB,QDADD,and QDS

31、UB),Or overflow in certain multiply instructions(SMLAxy and SMLAWy)嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMConditional Code SuffixesSuffix FlagsMeaningBranch ExampleEQZ setEqualBEQNEZ clearNot equalBNECS/HS C setHighter or same(unsigned=)BCSCC/LOC clearLower(unsigned)BHILSC set or Z clearLow or the same(uns

32、igned=BGELTN and V differ SignedBGTLEZ set,N and V differ Signedr2)r1=r1-r2;elser2=r2-r1;Startr1=r2?r1=r1-r2r1r2?r1=r2-r1StopYesNoYesc嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM 嵌入式系统架构软体设计 -using ARM Module#3-3:ARM Development Suite使用练习嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMARM ADS 1.2Others:C&C+Libraries ARM firmwa

33、re suite AM application library RealMonitor:for real time debug monitorarmcc&tccANSI C compilersarmcpp&tcpp ISO/Embedded C+compilerarmasmARM/Thumb assemblerarmlinkLinkerCodeWarrior Windows IDEAXDDebuggerfromelfFormat converterarmarLibrianARMulatorInstruction set simulator嵌入式系统架构软体设计嵌入式系统架构软体设计-using

34、 ARMImplementation Integrationarmasmarmcpp/tcpparmcc/tccarmlinkfromelfarmarASM sourceModulesC sourceModulesC+sourceModulesLibrariesLibrariesfromelfELF/DWARF2imageDisassemblyCode sizeData size.ROMimage.o.o.oELF object filesWith DWARD2Debug tables.s.c.cpp嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMPre-configured

35、Project Stationary Filesq Debug This build target is configured to built output binaries that are fully debuggable,at the expense of optimization.q Release This build target is debuggable to build output binaries that are fully optimized,at the expense of debug information.q DebugRel This build targ

36、et is output binaries that de adequate optimization,and give a good debug view.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMPossible Development EnvironmentMulti ICETarget boardSerial,EthernetAngelARMulator InsructionSet SimulationDebuggerELF/DWARF2 imageHost ComputerPrint portSerial,EthernetJTAG嵌入式系统架构软体设计嵌入式系统

37、架构软体设计-using ARMReferenceq ARM Developer Suie Version 1.2 Getting Startedq 请用Chapter 3练习使用 ADS.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARM嵌入式系统架构软体设计 -using ARM Module#3-4:ARM Instruction Set嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMARM 指令集特点指令集特点q 所有指令为32 bits ADD r0,r1,r2;r0:=r1+r2q 大部分的指令，可以在一个周期内执行完成q 指令皆可为有条件式执行q L

38、oad/store 架构.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMThumb 指令集指令集q Thumb指令长度为16 bits 针对程式码的密度最佳化，约为65%的ARM code size 适合小记忆体系统 Thumb指令支援的功能为ARM指令集的一部分 执行期间必须切换到Thumb模式ADDSr1,r1,#3ADDr1,#3嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMJazelleq Jazelle 技术可以让ARM执行8-bit Java Bytecode 硬件可以支援到95%的bytecodes 速度约为一般软件JVM的五倍Instruct

39、ionStreamARMJazelleThumbExecutionUnit嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMARM 指令集分类指令集分类q Branch instructionsq Data-processing instructionsq Load and store instructionsq Status register transfer instructionsq Coprocessor instructionsq Exception-generating instructions.嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMBran

40、ch instructionsq B Branchq BL Branch with link Store the return address to r14 e.g.CMP r2,#0 BLEQ function function MOV PC,r14B 0 x2200PC=0 x1200B 0 x2200嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMBranch Instruction Encodingq The range of the branch instruction is+/-32 Mbytesq L:the branch and link variant.Ass

41、embly Format:BLSRmBLS24-bit signed word offsetL1 0 1cond3128 2725 24230Branch and branch with link binary encoding嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMBranch instructions exampleq e.g.C if(a=0)unction 1(1);ElsecFunction 1()function2();Function2()return;qASMfunction 1 STMFDr13!,r0-r4,r14 BL function2 LDMF

42、Dr13!,r0-r4,pcfunction2 MOV pc,r14嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMData-processing instructions Encoding#0 0cond31282725 24260Operand 221 20 1916 1512 11Arithmetic/logic functionDestination registerFirst operand registerSet condition codes(NZVC)opcodeSRnRd10#rot8-bit immediate#shiftShRm0RsShRm1000087

43、6 534118 711Immediate alignmentRegister shift lengthshift typeSecond operand registerImmediate shift length117 6 543Assembly Format:S Rd,Rn,#S Rd,Rn,Rm,shift嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMData Processing OpodeAssembly Format:SRd,Rn#SRd,Rn Rm,Opcode Mnemonic MeaningEffect24:210000ANDLogical bit-wise

44、 AND Rd:=Rn&Op20001 EOR Logical bit-wise excusive ORRd:=Rn EOR Op20010 SUBSubtractRd:=Rn-Op20011RSBReverse subtractRd:=Op2-Rn0100ADDAdd Rd:=Rn+Op20101 ADCAdd with carry Rd:=Rn+Op2+C 0110 SBCSubtract with carry Rd:=Rn-Op2+C-10111RSCReverse subtract with carry Rd:=Op2-Rn+C-11000TSTTest Rd:=Scc on Rn&O

45、p21001TEQTest equivalence Rd:=Scc on Rn EOR Op21010CMPCompare Rd:=Scc on Rn-Op21011CMNCompare negated Rd:=Scc on Rn+Op21100ORRLogical bit-wise OR Rd:=Rn|Op21101MOVMove Rd:=Op21110BICBit clear Rd:=Rn AND NOT Op21111MVNMove negated Rd:=NOT Op2嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMExample Data-processing Ins

46、tructionsq Arithmetic operations ADD r0,r1,r2;r0=r1+r2 SUBr0,r1,r2;r0=r1-r2 RSBr0,r1,r2;r0=r2-r1q Bit-wise logical operations AND r0,r1,r2;r0=r1&r2 ORRr0,r1,r2;r0=r1|r2 EORr0,r1,r2;r0=r1 xor r2 BICr0,r1,r2;r0=and not r2;bit clear 嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMExample Data-processing Instructions(c

47、ont.)q Register movement operations MOV r0,r2;r0=r2 MVN r0,r2;r0=not r2q Comparison operations(set condition code bits N,Z,C,V)CMP r1,r2;set cc on r1-r2q Immediate operands ADD r3,r3,#1;r3=r3+1 ANDr8,r7,#&ff;r8=r77:0&:base 16嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMShifterq LSL:Logical Left Shift(X2)q LSR:Lo

48、gical Shift Right(/2)q ASR Arithmetic Right Shiftq ROR:Rotate RightDestinationDestinationDestinationDestination00Preserve Sign bit嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMShifter Applicationse.g.#1ADD r3,r2,r1,LSL#3;r3:=r2+8*r1e.g.#2r0=r1*5 r0=r1+(r1*4)ADD r0,r1,r1,LSL#2嵌入式系统架构软体设计嵌入式系统架构软体设计-using ARMMultip

49、ly instruction binary encodingAssembly FormatMULS Rd,Rm,RsMLAS Rd,Rm,Rs,RnS RdHi,RdLo,Rm,RsRdHi:the most significant 32 bits of 64-bit format numberRdLo:the least significant 32 bits of 64-bit format numberOpcode Mnemonic Meaning Effect23:21000 MUL Multiply(32-bit result)Rd:=(Rm*Rs)31:0001 MLA Multi

50、ply-accumulate (32-bit result)Rd:=(Rm*Rs+Rn)31:0100 UMULL Unsigned multiply longRdHi:RdLo:=Rm*Rs101 UMLAL Unsigned multiply-accumulate longRdHi:RdLo+=Rm*Rs110 SMULL Signed multiply longRdHi:RdLo:=Rm*Rs111 SMLAL Signed multiply-accumulate longRdHi:RdLo+=Rm*Rscond31282724 23021 20 1916 1512 11mulS Rd/