微电子电路microelectroniccircuit标准课件.ppt

1、Microelectronic Circuits-Fifth Edition Sedra/Smith2Copyright 2004 by Oxford University Press,Inc.Figure 14.1 Collector current waveforms for transistors operating in(a)class A,(b)class B,Microelectronic Circuits-Fifth Edition Sedra/Smith3Copyright 2004 by Oxford University Press,Inc.Figure 14.1 (Con

2、tinued)(c)class AB,and(d)class C amplifier stages.Microelectronic Circuits-Fifth Edition Sedra/Smith4Copyright 2004 by Oxford University Press,Inc.Figure 14.2 An emitter follower(Q1)biased with a constant current I supplied by transistor Q2.Microelectronic Circuits-Fifth Edition Sedra/Smith5Copyrigh

3、t 2004 by Oxford University Press,Inc.Figure 14.3 Transfer characteristic of the emitter follower in Fig.14.2.This linear characteristic is obtained by neglecting the change in vBE1 with iL.The maximum positive output is determined by the saturation of Q1.In the negative direction,the limit of the l

4、inear region is determined either by Q1 turning off or by Q2 saturating,depending on the values of I and RL.Microelectronic Circuits-Fifth Edition Sedra/Smith6Copyright 2004 by Oxford University Press,Inc.Figure 14.4 Maximum signal waveforms in the class A output stage of Fig.14.2 under the conditio

5、n I=VCC/RL or,equivalently,RL=VCC/I.Microelectronic Circuits-Fifth Edition Sedra/Smith7Copyright 2004 by Oxford University Press,Inc.Figure 14.5 A class B output stage.Microelectronic Circuits-Fifth Edition Sedra/Smith8Copyright 2004 by Oxford University Press,Inc.Figure 14.6 Transfer characteristic

6、 for the class B output stage in Fig.14.5.Microelectronic Circuits-Fifth Edition Sedra/Smith9Copyright 2004 by Oxford University Press,Inc.Figure 14.7 Illustrating how the dead band in the class B transfer characteristic results in crossover distortion.Microelectronic Circuits-Fifth Edition Sedra/Sm

7、ith10Copyright 2004 by Oxford University Press,Inc.Figure 14.8 Power dissipation of the class B output stage versus amplitude of the output sinusoid.Microelectronic Circuits-Fifth Edition Sedra/Smith11Copyright 2004 by Oxford University Press,Inc.Figure 14.9 Class B circuit with an op amp connected

8、in a negative-feedback loop to reduce crossover distortion.Microelectronic Circuits-Fifth Edition Sedra/Smith12Copyright 2004 by Oxford University Press,Inc.Figure 14.10 Class B output stage operated with a single power supply.Microelectronic Circuits-Fifth Edition Sedra/Smith13Copyright 2004 by Oxf

9、ord University Press,Inc.Figure 14.11 Class AB output stage.A bias voltage VBB is applied between the bases of QN and QP,giving rise to a bias current IQ given by Eq.(14.23).Thus,for small vI,both transistors conduct and crossover distortion is almost completely eliminated.Microelectronic Circuits-F

10、ifth Edition Sedra/Smith14Copyright 2004 by Oxford University Press,Inc.Figure 14.12 Transfer characteristic of the class AB stage in Fig.14.11.Microelectronic Circuits-Fifth Edition Sedra/Smith15Copyright 2004 by Oxford University Press,Inc.Figure 14.13 Determining the small-signal output resistanc

11、e of the class AB circuit of Fig.14.11.Microelectronic Circuits-Fifth Edition Sedra/Smith16Copyright 2004 by Oxford University Press,Inc.Figure 14.14 A class AB output stage utilizing diodes for biasing.If the junction area of the output devices,QN and QP,is n times that of the biasing devices D1 an

12、d D2,and a quiescent current IQ=nIBIAS flows in the output devices.Microelectronic Circuits-Fifth Edition Sedra/Smith17Copyright 2004 by Oxford University Press,Inc.Figure 14.15 A class AB output stage utilizing a VBE multiplier for biasing.Microelectronic Circuits-Fifth Edition Sedra/Smith18Copyrig

13、ht 2004 by Oxford University Press,Inc.Figure 14.16 A discrete-circuit class AB output stage with a potentiometer used in the VBE multiplier.The potentiometer is adjusted to yield the desired value of quiescent current in QN and QP.Microelectronic Circuits-Fifth Edition Sedra/Smith19Copyright 2004 b

14、y Oxford University Press,Inc.Figure 14.17 Electrical equivalent circuit of the thermal-conduction process;TJ TA=PDqJA.Microelectronic Circuits-Fifth Edition Sedra/Smith20Copyright 2004 by Oxford University Press,Inc.Figure 14.18 Maximum allowable power dissipation versus ambient temperature for a B

15、JT operated in free air.This is known as a“power-derating”curve.Microelectronic Circuits-Fifth Edition Sedra/Smith21Copyright 2004 by Oxford University Press,Inc.Figure 14.19 The popular TO3 package for power transistors.The case is metal with a diameter of about 2.2 cm;the outside dimension of the“

16、seating plane”is about 4 cm.The seating plane has two holes for screws to bolt it to a heat sink.The collector is electrically connected to the case.Therefore an electrically insulating but thermally conducting spacer is used between the transistor case and the“heat sink.”Microelectronic Circuits-Fi

17、fth Edition Sedra/Smith22Copyright 2004 by Oxford University Press,Inc.Figure 14.20 Electrical analog of the thermal conduction process when a heat sink is utilized.Microelectronic Circuits-Fifth Edition Sedra/Smith23Copyright 2004 by Oxford University Press,Inc.Figure 14.21 Maximum allowable power

18、dissipation versus transistor-case temperature.Microelectronic Circuits-Fifth Edition Sedra/Smith24Copyright 2004 by Oxford University Press,Inc.Figure 14.22 Thermal equivalent circuit for Example 14.5.Microelectronic Circuits-Fifth Edition Sedra/Smith25Copyright 2004 by Oxford University Press,Inc.

19、Figure 14.23 Safe operating area(SOA)of a BJT.Microelectronic Circuits-Fifth Edition Sedra/Smith26Copyright 2004 by Oxford University Press,Inc.Figure 14.24 A class AB output stage with an input buffer.In addition to providing a high input resistance,the buffer transistors Q1 and Q2 bias the output

20、transistors Q3 and Q4.Microelectronic Circuits-Fifth Edition Sedra/Smith27Copyright 2004 by Oxford University Press,Inc.Figure 14.25 The Darlington configuration.Microelectronic Circuits-Fifth Edition Sedra/Smith28Copyright 2004 by Oxford University Press,Inc.Figure 14.26 The compound-pnp configurat

21、ion.Microelectronic Circuits-Fifth Edition Sedra/Smith29Copyright 2004 by Oxford University Press,Inc.Figure 14.27 A class AB output stage utilizing a Darlington npn and a compound pnp.Biasing is obtained using a VBE multiplier.Microelectronic Circuits-Fifth Edition Sedra/Smith30Copyright 2004 by Ox

22、ford University Press,Inc.Figure 14.28 A class AB output stage with short-circuit protection.The protection circuit shown operates in the event of an output short circuit while vO is positive.Microelectronic Circuits-Fifth Edition Sedra/Smith31Copyright 2004 by Oxford University Press,Inc.Figure 14.

23、29 Thermal-shutdown circuit.Microelectronic Circuits-Fifth Edition Sedra/Smith32Copyright 2004 by Oxford University Press,Inc.Figure 14.30 The simplified internal circuit of the LM380 IC power amplifier.(Courtesy National Semiconductor Corporation.)Microelectronic Circuits-Fifth Edition Sedra/Smith3

24、3Copyright 2004 by Oxford University Press,Inc.Figure 14.31 Small-signal analysis of the circuit in Fig.14.30.The circled numbers indicate the order of the analysis steps.Microelectronic Circuits-Fifth Edition Sedra/Smith34Copyright 2004 by Oxford University Press,Inc.Figure 14.32 Power dissipation(

25、PD)versus output power(PL)for the LM380 with RL=8 W.(Courtesy National Semiconductor Corporation.)Microelectronic Circuits-Fifth Edition Sedra/Smith35Copyright 2004 by Oxford University Press,Inc.Figure 14.33 Structure of a power op amp.The circuit consists of an op amp followed by a class AB buffer

26、 similar to that discussed in Section 14.7.1.The output current capability of the buffer,consisting of Q1,Q2,Q3,and Q4,is further boosted by Q5 and Q6.Microelectronic Circuits-Fifth Edition Sedra/Smith36Copyright 2004 by Oxford University Press,Inc.Figure 14.34 The bridge amplifier configuration.Mic

27、roelectronic Circuits-Fifth Edition Sedra/Smith37Copyright 2004 by Oxford University Press,Inc.Figure 14.35 Double-diffused vertical MOS transistor(DMOS).Microelectronic Circuits-Fifth Edition Sedra/Smith38Copyright 2004 by Oxford University Press,Inc.Figure 14.36 Typical iDvGS characteristic for a

28、power MOSFET.Microelectronic Circuits-Fifth Edition Sedra/Smith39Copyright 2004 by Oxford University Press,Inc.Figure 14.37 The iDvGS characteristic curve of a power MOS transistor(IRF 630,Siliconix)at case temperatures of 55C,+25C,and+125C.(Courtesy Siliconix Inc.)Microelectronic Circuits-Fifth Edi

29、tion Sedra/Smith40Copyright 2004 by Oxford University Press,Inc.Figure 14.38 A class AB amplifier with MOS output transistors and BJT drivers.Resistor R3 is adjusted to provide temperature compensation while R1 is adjusted to yield the desired value of quiescent current in the output transistors.Res

30、istors RG are used to suppress parasitic oscillations at high frequencies.Typically,RG=100 W.Microelectronic Circuits-Fifth Edition Sedra/Smith41Copyright 2004 by Oxford University Press,Inc.Figure 14.39 Capture schematic of the class B output stage in Example 14.6.Microelectronic Circuits-Fifth Edi

31、tion Sedra/Smith42Copyright 2004 by Oxford University Press,Inc.Figure 14.40 Several waveforms associated with the class B output stage(shown in Fig.14.39)when excited by a 17.9-V,1-kHz sinusoidal signal.The upper graph displays the voltage across the load resistance,the middle graph displays the lo

32、ad current,and the lower graph displays the instantaneous and average power dissipated by the load.Microelectronic Circuits-Fifth Edition Sedra/Smith43Copyright 2004 by Oxford University Press,Inc.Figure 14.41 The voltage(upper graph),current(middle graph),and instantaneous and average power(bottom

33、graph)supplied by the positive voltage supply(+VCC)in the circuit of Fig.14.39.Microelectronic Circuits-Fifth Edition Sedra/Smith44Copyright 2004 by Oxford University Press,Inc.Figure 14.42 Waveforms of the voltage across,the current through,and the power dissipated in the pnp transistor QP of the o

34、utput stage shown in Fig.14.39.Microelectronic Circuits-Fifth Edition Sedra/Smith45Copyright 2004 by Oxford University Press,Inc.Figure 14.43 Transfer characteristic of the class B output stage of Fig.14.39.Microelectronic Circuits-Fifth Edition Sedra/Smith46Copyright 2004 by Oxford University Press

35、,Inc.Microelectronic Circuits-Fifth Edition Sedra/Smith47Copyright 2004 by Oxford University Press,Inc.Figure 14.44 Fourier-series components of the output waveform of the class B output stage in Fig.14.39.Microelectronic Circuits-Fifth Edition Sedra/Smith48Copyright 2004 by Oxford University Press,

36、Inc.Figure P14.8Microelectronic Circuits-Fifth Edition Sedra/Smith49Copyright 2004 by Oxford University Press,Inc.Figure P14.11Microelectronic Circuits-Fifth Edition Sedra/Smith50Copyright 2004 by Oxford University Press,Inc.Figure P14.22Microelectronic Circuits-Fifth Edition Sedra/Smith51Copyright

37、2004 by Oxford University Press,Inc.Figure P14.37Microelectronic Circuits-Fifth Edition Sedra/Smith52Copyright 2004 by Oxford University Press,Inc.Figure P14.38Microelectronic Circuits-Fifth Edition Sedra/Smith53Copyright 2004 by Oxford University Press,Inc.Figure P14.42Microelectronic Circuits-Fifth Edition Sedra/Smith54Copyright 2004 by Oxford University Press,Inc.Figure P14.50