1、30-Sep , 2003Charles YM ChenNB Product EngineeringS Note Power Sequence Presentation2S Note Power Sequence PresentationS Note Block DiagramUNBUFFEREDOn-Board DDRSODIMM x 8400M HzAG T L + FSB66M HzUNBUFFEREDDDR SODIMMSocket200-P IN D D R SO D IM MD D R 200/266/333Intel ICH4-MU SB 2.0 (2+2+2)ET HERN E
2、T(10/100M b)AC97 2.2AT A 66/100ACP I 1.1IN T . RT CL P C I/FP CI/P CI BRID G EAug 08 264,5,67,8,9,10Banias/DothanIntel Mobile CPUIntelMotara-GM PlusAG T L + CP U I/FL VD S, CRT I/FIN T EG RAT ED G RAHP ICSD D R M emory I/FHub-L IN KICS950813Clock Generator341H8S/2161BKBCL P C Bus / 33M Hz12.1 XGA LC
3、DL VD S1817RG B CRTCRT SELECTIONSDSocket30PCMCIASLOT28P CM CIA I/FM ediaBay I/F2926,27Power SwitchRICOHR5C5811Cardbus + SD CardTPS220531,32Intel Ethernet10/100 PHY82562EZIntel EthernetGiga LAN82541EXORAT M ELAT 93C46Mini-PCI34802.11a/b/gL AN M IIRJ45CONN33P CI Bus / 33M HzNS FIR & LPC SWPC873824540S
4、ST -49L F008FWHLPC DebugBoard Conn41TCPAChip4443PMH-4G/ASecondary ID EU SB 2.0AC L IN KAC97 CODECAD1981BLINE OUTOP AMPMAX9750CDC353936,37,38Modem/BluetoothUSB 1CH4CH2,3USB 223HDDAT A 66/100P rimary ID EAT A 66/100Int. MICMIC INRJ11CONN33S Note-1 Block Diagram03209-SD-Final46MediaSlice24,2524,2531,32
5、USB x 3HDD, Optical DrivesCRTPS/2 x2Line InParallel PortRJ11DC-INUltraBay46RJ452nd BatteryStereo Speaker x 2Media SliceLine OutMAX3243RS232 T ransceiver39IRM S6452FIRPC87392NX SIOCOM PortL P C Bus42Int. KBTrack point IVU SB20H04USB HubSM SCKeyboard LightL M 83+L M 26+D S75AT 24RF08CNAT M ELT hermal
6、SensorSMBusSecondary IDE11,12,13,15,1614,15,1620,21,2219CRT PortMedia Slice4647483S Note Power Sequence PresentationS Note Power on SequenceMAX1977MAX1845MAX1907MAX1992Fuse7AFETPchFETPchFETNchFETNchDC-INConnectorDockingConnectorVINT16TsurumaiVCC3SWVCCCPUCOREFETNchFETNchLP3958Fuse0.75AFETPchVCC_FANVC
7、C5BVCC5MUSB_PWR1USB_PWR2MICVCCVCC2R5AFETNchVCC3BVCC3MFETPchVCC3AUXVCC3PFuse2AFETNchVBL16Fuse2AVCCCPUIOVCC1R5MFETNchFETNchFETNchVCC1R5BVCC1R5AUXFETNchVCCGBEIOAUXVCC1R8M(Kenai2-32)For Ethernet ControllerPolySW1.5AVDD15H8VCC1R25BLP2996MAX4245VCCGMCHCOREMAX1845_VREFMAX1683FETNchPolySW1.5AMAX8880VCCACPUM
8、AX1935VCC1R8MMAX1935VCC3MVCCGBECOREAUXICH4MPMH4CPUPWRSWITCH#PWRSW_H8#PWRSW_H8#Power ButtonPWRSW#ICH_SLP_S3#ICH_SLP_S4#ICH_SLP_S4#ICH_SLP_S3#PM_SLP_S3#PM_SLP_S5#VTT_PWRGVTT_PWRGVR_PWRGDVR_PWRGDPCIRST#PWRBTN#SLP_S3#SLP_S4#+PWRONB_ONVCPU_CORE_ONDDR_VREFMPWRGAPWRGBPWRGPCIRST#CC_CPUPWRGDCC_CPUPWRGDPWRGOO
9、DGTL_CPURST#GTL_CPURST#GTL_ADS#MONTARA GM+CPURST#BPWRGPWROKIM VPOKDOCK-PWR16_F12VREGIN1623444.14455666677777888955101010101111111111121213141516171819MPWRGBPWRGPWROKRSMRST#4S Note Power Sequence PresentationPower on seuqence tableSignal nameDescriptionmeasure point1DOCK-PWR16-FU46 Pin 1,2,3U46 Pin1,
10、2,32VREGIN16Dock-PWR16-F=D42 pin3D42 Pin3VCC3SWoutput pin made from the internal regulator.U28 Pin 593CV16 of U47 -4.5V U46 in saturation region = U46 pin 5,6,7,8,output CV16U46 Pin 5,6,7,8VINT16R50 pin24EXTPWR_PMH#Power on logic in PMH4U36 Pin 73VCC3M_ONMAXIM1845 ON2, TSURUMAI 3M_ON, MAXIM1935 SHDN
11、#R696 Pin2 VCC5M_ONMAXIM 1977 ON3&ON5, TSURUMAI 5M_ONR329 Pin2VCC3M OUT3 of MAXIM 1977U85 Pin 22VCC5M OUT5 of MAXIM 1977U85 Pin 21VCC1R5MOUT2 of MAXIM 1845U43 Pin 15VCC1R8MOUT of MAXIM 1935U42 Pin 7,8MPWRGOutput for VCC3M/VCC5M Power Good Signal (Open-Drain)U28 Pin515ICH_SLP_S3#ICH_SLP_S3# is for po
12、wer plane controlU36 Pin 20ICH_SLP_S4#ICH_SLP_S4# is for power plane controlU36 Pin 746AUX_ONTSURUMAI RD3_ON & RD4_ON, MAXIM1935 SHDN#,U36 Pin 88VCC3AUXVCC3AUX power by FDC658PU40 Pin4VCCGBECOREAUXOUT of MAXIM 1935U60 Pin 7,8GBE_AUXPWRGPOK of MAXIM 1935 U60 Pin 3VCCGBEIOAUX_DRVRD3_DRV of TSURUMAIR20
13、6 Pin 2VCCGBEIOAUXVCCGBEIOAUX power by FDN359ANQ64 Pin 2VCC1R5AUX_DRVRD4_DRV of TSURUMAIU28 Pin 31VCC1R5AUXVCC1R5AUX power by FDN359ANQ22 Pin 27PWRSWITCH#Power buttonD21 Pin 1PWRSW#Bus control outputs, regardless of the input/output direction indicatedU22 Pin 20PWRSW_H8#Bus control outputs, regardle
14、ss of the input/output direction indicatedU22 Pin 19ICH_SLP_S3#ICH_SLP_S3# is for power plane controlU36 Pin 20PM_SLP_S3#Outputted by PMH4. It shuts off power to all non-critical systems when in S3(Suspend To RAM),S4 (Suspend to Disk), or S5 (Soft Off) states.U36 Pin 71ICH_SLP_S4#ICH_SLP_S4# is for
15、power plane controlU36 Pin 74PM_SLP_S5#Outputt by PMH4, The signal is used to shut power off to all non-critical systemswhen in the S5 (Soft Off) states.U36 Pin 728+PWRONMAXIM1845 ON1, TSURUMAI 3A_ONU36 Pin 63B_ONMAXIM8880 SHDN#, LP2996 SD#, MAXIM4245 SHDN#, MAXIM1992SHDN#, TSURUMAI 3B_ON, 5B_ON, RD
16、2_ONR350 Pin 2VCPU_CORE_ONMAXIM1907 SHDN#D55 Pin29VCC2R5AOUT1 of MAXIM 1845U43 Pin1S Note Power Sequence Table (adapter in)gsV5S Note Power Sequence PresentationPower on seuqence table10DDR_VREFVoltage of DDR SODIMMU7 Pin 4VCC1R25BVTT & VSENSE of LP2996TC12VCC3BVCC3B power by FDC655ANQ72 Pin 4VCC5BV
17、CC5B power by FDC655ANQ31 Pin 411VCCACPUOUT by MAXIM8880U41 Pin3VCCGMCHCORECore power of Motara-GM PlusTC13 Pin 1MICVCCVOUT of LP3985U37 Pin 5VCCCPUIOCPU I/O power by MAXIM 1992TC3VCC1R5B_DRVRD2_DRV of TSURUMAIU28 Pin 35VCC1R5BVCC1R5B power by FDC655ANQ28 Pin 412MPWRGOutput for VCC3M/VCC5M Power Goo
18、d Signal (Open-Drain)U28 Pin51APWRGOutput for VCC3A Power Good Signal (Open-Drain)U28 Pin 49BPWRG(PWROK)Output for VCC5B/VCC3B Power Good Signal (Open-Drain)D30 Pin 113VTT_PWRGCPU I/O power goodU59 Pin 414VCORE_ONMAXIM1907 SHDN#U12 Pin 7VCCCPUCORECPU Core power TC4, TC5, TC615VR_PWRGDMAXIM 1992 IMVP
19、 OKU12 Pin 3716PCIRST#ICH4 asserts PCIRST# to reset devices that reside on the PCI bus. The ICH4asserts PCIRST# during power-up and when S/W initiates a hard reset sequencethrough the RC (CF9h) registerR238 Pin117CC_CPUPWRGDThis signal should be connected to the processors PWRGOOD input. allow for I
20、ntel SpeedStep technology support, this signal is kept high during an Intel SpeedSteptechnology state transition to prevent loss of processor context.R259 Pin 218GTL_CPURST#The CPURST# pin is an output from the MGMCH. The MGMCH assertsCPURST# while RSTIN# (PCIRST# from ICH4) is asserted and for appr
21、oximately1 ms after RSTIN# is deasserted.R630 Pin 219GTL_ADS#The processor bus owner asserts ADS# to indicate the first of two cycles of a requestphase.Test pad20LPC_FRAME#LFRAME# indicates the start of an LPC cycle, or an abort.U36 Pin 421P_TRDY#TRDY# indicates the ICH4s ability, as a Target, to co
22、mplete the current data phaseof the transaction. TRDY# is used in conjunction with IRDY#. A data phase iscompleted when both TRDY# and IRDY# are sampled asserted.RN41 Pin221P_IRDY#TRDY# indicates the ICH4s ability, as an Initiator, to complete the current dataphase of the transaction. It is used in
23、conjunction with TRDY#. A data phase iscompleted on any clock that both IRDY# and TRDY# are sampled asserted.RN41 Pin321P_FRAME#The current Initiator drives FRAME# to indicate the beginning and duration of a PCItransaction. While the Initiator asserts FRAME#, data transfers continue. When theInitiat
24、or negates FRAME#, the transaction is in the final data phase.RN41 Pin46S Note Power Sequence PresentationDOCK-PWR16_F & VREGIN 16DOCK_PWR16DOCK-PWR16_FCV16For EMIPlease close to JK4NO ASMC1SCD1U50V3KX12C2SC1000P50V12R394470KR212C5SCD1U50V3KX12C6SC1000P50V12JK1DC-JACK7022.10037.68113245F1R45100712R3
25、9310R212R395470KR2F12C4SCD47U25V6KX12C7DY-SC4D7U25V6KX12U46TPC8109-P65437821VREGIN16DOCK-PWR16_FD42DAN222123F15FUSE-D5A32V12DOCK-PWR16-FU46 Pin 1,2,3U46 Pin1,2,3VREGIN16Dock-PWR16-F=D42 pin3D42 Pin3CV16 of U47 -4.5V U46 in saturation region = U46 pin 5,6,7,8,output CV16U46 Pin 5,6,7,8gsV7S Note Powe
26、r Sequence PresentationVCC3SWVCC3SWoutput pin made from the internal regulator.U28 Pin 598S Note Power Sequence PresentationVCC3M_ON & VCC5M_ONEXTPWR_PMH#Power on logic in PMH4U36 Pin 73VCC3M_ONMAXIM1845 ON2, TSURUMAI 3M_ON, MAXIM1935 SHDN#R696 Pin2 VCC5M_ONMAXIM 1977 ON3&ON5, TSURUMAI 5M_ONR329 Pin
27、2Spec: V C C 3 M _ O N ( M _ O N 1 ) t o VCC5M_ON(M_ON2) is 10ms20ms9S Note Power Sequence PresentationVCC3M & VCC5MMAX1977_LDO5MAX1977_VCCDCBATOUT_MAX1977DCBATOUT_MAX1977MAX1977_LDO3MAX1977_VCCVCC5B3D3V_DC_S5VCC3MVINT16MAX1977_LDO5VCC3MVL55V_DC_S5VCC5MVREF2MAX1977_REF100mA MAX. eachSKIP# = GND : SK
28、IP MODESKIP# = REF/FloatING : UltrasonicMODE (25KHz min) CLOSE TOCMOS3A (4.5A)3.6A5APLFC0745PILIM5: 5*36.5 / (36.5+110) = 1.245V 1.245 / 15 = 8.3AILIM3: 5*22.6 / (22.6+110) = 0.8521V 85 / 15 = 5.6AThese components should belocated near by MAX1977These components should belocated near by MAX1977USE 7
29、3.7SZ14.0AH SYMBOL TO REPLACE 73.7SZ14.0AHN1 SYMBOLU89 use the FDS6690A symbol.MAX1977_BST3RMAX1977_BST5RMAX1977_DH5MAX1977_ILIM5MAX1977_ILIM3MAX1977_ON3MAX1977_LX3MAX1977_BST3MAX1977_BST5MAX1977_FB3PM_SLP_S3MAX1977_SKIP#MAX1977_FB5MAX1977_PWRGDMAX1977_ON5MAX1977_CS3MAX1977_DL3MAX1977_V+1977_DH5MAX1
30、977_DH3MAX1977_DL51977_DH31977_DL31977_DL5MAX1977_LX5R7212MR312R7362MR312R73110KR3F12D70BAW56LT1123GSDQ732N7002123C728SC47PC715SCD22U10V3KX12G14GAP-OPEN21G13GAP-OPEN21G12GAP-OPEN21R73915KR3F12G15GAP-OPEN21TP12TPAD30R752110KR3F12C725SCD1U25V3KX12R7560R120612C731SC4D7U25V6KX12C746SCD1U16V3KXC702SCD1U1
31、6V3KXR753100KR312C729SC47PR341100KR312R388D015R2512F64.R0155.L0212D37SSM1421C377SCD1U10V2KX12R748110KR3F12R3710R3-U12U85MAX1977EEI-UCS513PGOOD2ON33ON54ILIM35SHDN#6FB37REF8FB59PRO#10ILIM511SKIP#12CS31BST514LX515DH516VCC17LDO 518DL519V+20OUT521OUT322GND23DL324LDO 325DH326LX327BST328R75136K5R3F12R74922
32、K6R3F12C360SCD1U10V2KX12C392SC10U10V5ZY12TC17ST100U10VM12TC18ST100U10VM12TC10ST150U6D3VDM-512R71110R312R75010R312R7410R3-U12C419SC4D7U25V-1-U12L15IND-3D9UH12G18GAP-OPEN21G17GAP-OPEN21G20GAP-OPEN21G19GAP-OPEN21U91SI4814DY12348765R7470R3-U12R7460R3-U12R7540R3-U12U80NC7SZ14-UNC1A2GND3Y4VCC5R71210KR212R
33、3611KR212R3601KR212R7193D3R512R7273D3R512C742SC1U10V3ZY12C705SC100P50V2JN12C740SC100P50V2JN12C753SCD1U25V3KX12C756SCD1U25V3KX12R362100KR212C751SC10U25VKX-212C755SC10U25VKX-212C744SC10U25VKX-212C749SC10U25VKX-212R74049D9R3F12SSSGDDDDU90SI480012345678SSSGDDDDU89TPC8014-N12345678L14IND-4UH1342R391D015R
34、2512F64.R0155.L0212R71010K7R3D12R7187K32R3F12VCC5M_ON43PWRSHUTDOWN#43,47,59PM_SLP_S3#41,43,56VCC3M & VCC%M power by MAXIM 197710S Note Power Sequence PresentationVCC3M & VCC5MVCC3M OUT3 of MAXIM 1977U85 Pin 22VCC5M OUT5 of MAXIM 1977U85 Pin 2111S Note Power Sequence PresentationVCC1R5M & VCC1R8MVCC1
35、R5MRds(on) = 26.5 mohmPLFC0745P1.5V / 4AMAX1845_DH21845_DL21845_DH2MAX1845_BST2RMAX1845_BST2MAX1845_DL2MAX1845_LX2R7040R3-U12R7320R3-U12U82SI4814DY12348765R3434K99R3F-112D64B220LFA21L11IND-3D8UH12D65B220LFA21TC16ST220U4VDM-612C723SCD01U25V2KX12C726SCD1U25V3KX12C367SCD1U25V3KX12R356100KR3F12R36347K5R
36、3F12U43MAX1845EEI-UOUT11FB12ILIM13V+4TON5SKIP#6PGOOD7OVP8UVP9REF10ON111ON212ILIM213FB214CS128LX127DH126BST125DL124GND23VCC22VDD21DL220BST219DH218LX217CS216OUT215R3660R3-U12R34410KR3F12C710SC4D7U25V-U12VCC3M_ON 43VL5Close to pin21Close to pin4C381SCD01U25V2KX12C389SC1U25V5ZY12C383SCD01U25V2KX12C378SC
37、1U10V3KX12VINT16VL5R72520R2F12D73BAW56LT1123C390SC1U10V3KX12MAX1845_VREFC374SC1U10V3KX12C369SC33P50V2JN12VCC1R5M power by MAXIM 1845VCC1R8MVCC3MR35384K5R3F12U42MAX1935ETAIN1IN2POK3SHDN#4GND5SET6OUT7OUT8GND9C711SC10U10V-3-U12C386SC1U10V3KX12R345105KR3F12VCC3M_ON43,56VCC1R8M power by MAXIM 193512S Not
38、e Power Sequence PresentationVCC1R5M & VCC1R8MVCC1R5MOUT2 of MAXIM 1845U43 Pin 15VCC1R8MOUT of MAXIM 1935U42 Pin 7,813S Note Power Sequence PresentationMPWRGIn the block of M_PGS, the voltage of VCC5M and VCC3M are monitored by the internal analog comparator respectively, each stateis supplied to M_
39、PGS output. The terminal is Open drain structure.The operation of detection is started when both 5M_ON and 3M_ON are equal to High. The analog Comparator has hysteresisvoltage and generate high signal when the following condition are satisfied.Greater than 4.461V(Typ.) at power on stage of VCC5M（Ris
40、ing Edge）and lower than 4.311V (Typ.) at the shut down stage(Falling edge) after 47.5ms +/- 2.5msGreater than 2.943V(Typ.) at power on stage of VCC3M（Rising Edge）and lower than 2.793V (Typ.) at the shut down stage(Falling edge) after 47.5ms +/- 2.5msL output isVCC5M4.311V（Typ.），VCC3M2.793V（Typ.）14S
41、Note Power Sequence PresentationMPWRGMPWRGOutput for VCC3M/VCC5M Power Good Signal (Open-Drain)U28 Pin51Spec:VCC3/5M Power to MPWRG is 47.5+/- 5ms 15S Note Power Sequence PresentationICH_SLP_S3# & ICH_SLP_S4#ICH_SLP_S3#ICH_SLP_S3# is for power plane controlU36 Pin 20ICH_SLP_S4#ICH_SLP_S4# is for pow
42、er plane controlU36 Pin 74Spec: Depend on ICH4M spec , the SLP_S4# and SLP_S3# should rise up after Power on. SLP_S3# to SLP_S4# is 1 RTCCLK2RTCCLK. (1RTC clock is approximately 32 us.) 16S Note Power Sequence PresentationVCC3AUX & VCCGBECOREAUXVCCGBECOREAUXVCC3MC524SC1U10V3KX12U60MAX1935ETAIN1IN2PO
43、K3SHDN#4GND5SET6OUT7OUT8GND9R53484K5R3F12R53642K2R3F12C523SC10U10V-3-U12AUX_ON43,58GBE_AUXPWRG43VCC3MVCC3AUXR705100KR212C693SCD1U10V2KX12R7061KR212GSDQ302N7002123DDGDDSU40FDC658P123456R70847KR212AUX_ON43,59,60VCC3AUX power by FDC658P VCCGBECOREAUX power by MAXIM 193517S Note Power Sequence Presentat
44、ionVCC3AUX & VCCGBECOREAUXVCC3AUXVCC3AUX power by VCC3M and FDC658PU40 Pin4VCCGBECOREAUXOUT of MAXIM 1935U60 Pin 7,8GBE_AUXPWRGPOK of MAXIM 1935 U60 Pin 318S Note Power Sequence PresentationVCCGBEIOAUX & VCCGBEIOAUX_DRV VCCGBEIOAUXVCC1R8MGSDQ64FDN359AN123D57RB521S-3021R579470KR312R578270R312C586SCD1
45、U25V3KX12VCCGBEIOAUX_DRV59VCCGBEIOAUX_DRVRD3_DRV of TSURUMAIR206 Pin 2VCCGBEIOAUXVCCGBEIOAUX power by FDN359ANQ64 Pin 219S Note Power Sequence PresentationVCC1R5AUX & VCC1R5AUX_DRVVCC1R5AUX_DRVRD4_DRV of TSURUMAIU28 Pin 31VCC1R5AUXVCC1R5AUX power by FDN359ANQ22 Pin 2VCC1R5MVCC1R5AUXD31RB521S-3021R30
46、1470KR312R300270R312GSDQ22FDN359AN123C298SCD1U25V3KX12VCC1R5AUX_DRV5920S Note Power Sequence PresentationPress Power ButtonPWRSWITCH#Power buttonD21 Pin 1PWRSW#Bus control outputs, regardless of the input/output direction indicatedU22 Pin 20PWRSW_H8#Bus control outputs, regardless of the input/outpu
47、t direction indicatedU22 Pin 1921S Note Power Sequence PresentationPress Power ButtonICH_SLP_S3#ICH_SLP_S3# is for power plane controlU36 Pin 20PM_SLP_S3#Outputted by PMH4. It shuts off power to all non-critical systems when in S3(Suspend To RAM),S4 (Suspend to Disk), or S5 (Soft Off) states.U36 Pin
48、 7122S Note Power Sequence PresentationPress Power ButtonICH_SLP_S4#ICH_SLP_S4# is for power plane controlU36 Pin 74PM_SLP_S5#Outputt by PMH4, The signal is used to shut power off to all non-critical systemswhen in the S5 (Soft Off) states.U36 Pin 7223S Note Power Sequence Presentation+PWRONMAXIM184
49、5 ON1, TSURUMAI 3A_ONU36 Pin 63B_ONMAXIM8880 SHDN#, LP2996 SD#, MAXIM4245 SHDN#, MAXIM1992SHDN#, TSURUMAI 3B_ON, 5B_ON, RD2_ONR350 Pin 2VCPU_CORE_ONMAXIM1907 SHDN#D55 Pin2+PWRON & B_ON & VCPU_CORE_ONSpec: From +PWRON to B_ON is 10ms20ms 24S Note Power Sequence PresentationVCC2R5AVCC2R5A7.8 * 1.5 = 1
50、1.711.7 * 22 = 257mVILIM1: 5*100 / (100+100) = 2.5VOCP1: 250 / 22 = 11.36ARds(on) = 22 mohmPLFC1045P2.5V / 7.8A1845_DH11845_DL1R37510KR3F12R37815KR3F12R7281KR212R7071KR212R723470KR212C732SCD01U25V2KX12D72S1N4148-1-U12D69S1N4148-1-U12D67B220LFA21D34B220LFA21TC15ST150U6D3VDM-512TC14ST150U6D3VDM-512R72
