1、嵌入式處理器架構與程式設計王建民中央研究院 資訊所2008年 7月2ContentsnIntroductionnComputer ArchitecturenARM ArchitecturenDevelopment Tools:GNU Development ToolsnARM Instruction SetnARM Assembly LanguagenARM Assembly Programming:GNU ARM ToolChainnInterrupts and MonitorLecture 10Interrupts and Monitor4OutlinenException Handlin
2、g and Software InterruptsnELF: Executable and Linking FormatnARM Monitor and Program Loading5Normal Program Flow vs. ExceptionnNormally, programs execute sequentially (with a few branches to make life interesting) nNormally, programs execute in user mode nExceptions and interrupts break the sequenti
3、al flow of a program, jumping to architecturallydefined memory locations nIn ARM, SoftWare Interrupt (SWI) is the “system call” exception6ARM ExceptionsnTypes of ARM exceptions lReset: when CPU reset pin is asserted lundefined instruction: when CPU tries to execute an undefined opcode lsoftware inte
4、rrupt: when CPU executes the SWI instruction lprefetch abort: when CPU tries to execute an instruction prefetched from an illegal addressldata abort: when data transfer instruction tries to read or write at an illegal address lIRQ: when CPUs external interrupt request pin is asserted lFIQ: when CPUs
5、 external fast interrupt request pin is asserted 7The Programmers ModelnProcessor Modes (of interest)lUser: the “normal” program execution mode.lIRQ: used for generalpurpose interrupt handling.lSupervisor: a protected mode for the operating system.nThe Register SetlRegisters R0-R15 + CPSRlR13: Stack
6、 Pointer (by convention)lR14: Link Register (hardwired)lR15: Program Counter where bits 0:1 are ignored (hardwired)8TerminologynThe terms exception and interrupt are often confused nException usually refers to an internal CPU eventlfloating point overflow lMMU fault (e.g., page fault) ltrap (SWI) nI
7、nterrupt usually refers to an external I/O eventlI/O device request lreset nIn the ARM architecture manuals, the two terms are mixed together9What do SWIs do?nSWIs (often called software traps) allow a user program to “call” the OS that is, SWIs are how system calls are implemented. nWhen SWIs execu
8、te, the processor changes modes (from User to Supervisor mode on the ARM) and disables interrupts. 10SWI ExamplenTypes of SWIs in ARM Angel (axd or armsd)lSWI_WriteC(SWI 0) Write a byte to the debug channel lSWI_Write0(SWI 2) Write the nullterminated string to debug channel lSWI_ReadC(SWI 4) Read a
9、byte from the debug channel lSWI_Exit(SWI 0 x11) Halt emulation this is how a program exits lSWI_EnterOS(SWI 0 x16) Put the processor in supervisor mode lSWI_Clock(SWI 0 x61) Return the number of centiseconds lSWI_Time(SWI 0 x63) Return the number of secs since Jan. 1, 197011What happens on an SWI?1
10、nThe ARM architecture defines a Vector Table indexed by exception type nOne SWI, CPU does the following: PC 0 x08 nAlso, sets LR_svc, SPSR_svc, CPSR (supervisor mode, no IRQ) ADD r0,r0,r1 SWI 0 x10 SUB r2,r2,r0USER Programto R_Handlerto U_Handlerto S_Handlerto P_Handlerto D_Handler. to I_Handlerto F
11、_HandlerVector Table (spring board)starting at 0 x00 in memory0 x000 x040 x080 x0c0 x100 x140 x180 x1c(Reset(Undef instr.)(SWI)(Prefetch abort)(Data abort)(Reserved)(IRQ)(FIQ)SWI Handler112What happens on an SWI?2nNot enough space in the table (only one instruction per entry) to hold all of the code
12、 for the SWI handler function nThis one instruction must transfer control to appropriate SWI Handler nSeveral options are presented in the next slideADD r0,r0,r1 SWI 0 x10 SUB r2,r2,r0USER Programto R_Handlerto U_Handlerto S_Handlerto P_Handlerto D_Handler. to I_Handlerto F_HandlerVector Table (spri
13、ng board)starting at 0 x00 in memory0 x000 x040 x080 x0c0 x100 x140 x180 x1c(Reset(Undef instr.)(SWI)(Prefetch abort)(Data abort)(Reserved)(IRQ)(FIQ)SWI Handler213“Vectoring” Exceptions to HandlersnOption of choice: Load PC from jump table (shown below) nAnother option: Direct branch (limited range)
14、ADD r0,r0,r1 SWI 0 x10 SUB r2,r2,r0USER ProgramLDR pc, pc, 0 x100 LDR pc, pc, 0 x100 LDR pc, pc, 0 x100 LDR pc, pc, 0 x100LDR pc, pc, 0 x100 LDR pc, pc, 0 x100 LDR pc, pc, 0 x100 LDR pc, pc, 0 x100Vector Table (spring board)starting at 0 x00 in memory0 x000 x040 x080 x0c0 x100 x140 x180 x1cSWI Handl
15、er(S_Handler)2&A_Handler &U_Handler &S_Handler &P_Handler.“Jump” Table0 x1080 x10c0 x1100 x114.Why 0 x110?14What happens on SWI completion?nVectoring to the S_Handler starts executing the SWI handler nWhen the handler is done, it returns to the program at the instruction following the SWI nMOVS rest
16、ores the original CPSR as well as changing pcADD r0,r0,r1 SWI 0 x10 SUB r2,r2,r0USER Programto R_Handlerto U_Handlerto S_Handlerto P_Handlerto D_Handler. to I_Handlerto F_HandlerVector Table (spring board)starting at 0 x00 in memory0 x000 x040 x080 x0c0 x100 x140 x180 x1c(Reset(Undef instr.)(SWI)(Pr
17、efetch abort)(Data abort)(Reserved)(IRQ)(FIQ)3MOVS pc, lrSWI Handler(S_Handler)15How to determine the SWI number?nAll SWIs go to 0 x08ADD r0,r0,r1 SWI 0 x10 SUB r2,r2,r0USER Programto R_Handlerto U_Handlerto S_Handlerto P_Handlerto D_Handler. to I_Handlerto F_HandlerVector Table (spring board)starti
18、ng at 0 x00 in memory0 x000 x040 x080 x0c0 x100 x140 x180 x1c(Reset(Undef instr.)(SWI)(Prefetch abort)(Data abort)(Reserved)(IRQ)(FIQ)SWI Handler must serve as clearinghouse for differentSWIsMOVS pc, lrSWI Handler(S_Handler)16SWI Instruction FormatnExample: SWI 0 x1824bit “comment” field (ignored by
19、 processor)1 1 1 1cond02324273128SWI number17Executing SWI InstructionOn SWI, the processor(1) copies CPSR to SPSR_SVC (2) set the CPSR mode bits to supervisor mode (3) sets the CPSR IRQ to disable (4) stores the value (PC + 4) into LR_SVC (5) forces PC to 0 x08 ADD r0,r0,r1 SWI 0 x10 SUB r2,r2,r0US
20、ER Programto R_Handlerto U_Handlerto S_Handlerto P_Handlerto D_Handler. to I_Handlerto F_HandlerVector Table (spring board)starting at 0 x00 in memory0 x000 x040 x080 x0c0 x100 x140 x180 x1c(Reset(Undef instr.)(SWI)(Prefetch abort)(Data abort)(Reserved)(IRQ)(FIQ)LDR r0,lr,#4BIC r0,r0,#0 xff000000R0
21、holds SWI numberMOVS pc, lrSWI Handler(S_Handler)24bit “comment” field (ignored by processor)1 1 1 1cond18Jump to “Service Routine”ADD r0,r0,r1 SWI 0 x10 SUB r2,r2,r0USER Programto R_Handlerto U_Handlerto S_Handlerto P_Handlerto D_Handler. to I_Handlerto F_HandlerVector Table (spring board)starting
22、at 0 x00 in memory0 x000 x040 x080 x0c0 x100 x140 x180 x1c(Reset(Undef instr.)(SWI)(Prefetch abort)(Data abort)(Reserved)(IRQ)(FIQ)LDR r0,lr,#4BIC r0,r0,#0 xff000000switch (r0) case 0 x00: service_SWI1(); case 0 x01: service_SWI2(); case 0 x02: service_SWI3();MOVS pc, lrSWI Handler(S_Handler)24bit “
23、comment” field (ignored by processor)1 1 1 1condOn SWI, the processor(1) copies CPSR to SPSR_SVC (2) set the CPSR mode bits to supervisor mode (3) sets the CPSR IRQ to disable (4) stores the value (PC + 4) into LR_SVC (5) forces PC to 0 x08 19Problem with The Current HandlerOn SWI, the processor(1)
24、copies CPSR to SPSR_SVC (2) set the CPSR mode bits to supervisor mode (3) sets the CPSR IRQ to disable (4) stores the value (PC + 4) into LR_SVC (5) forces PC to 0 x08 ADD r0,r0,r1 SWI 0 x10 SUB r2,r2,r0USER Programto R_Handlerto U_Handlerto S_Handlerto P_Handlerto D_Handler. to I_Handlerto F_Handle
25、rVector Table (spring board)starting at 0 x00 in memory0 x000 x040 x080 x0c0 x100 x140 x180 x1c(Reset(Undef instr.)(SWI)(Prefetch abort)(Data abort)(Reserved)(IRQ)(FIQ)LDR r0,lr,#4BIC r0,r0,#0 xff000000switch (r0) case 0 x00: service_SWI1(); case 0 x01: service_SWI2(); case 0 x02: service_SWI3();MOV
26、S pc, lrSWI Handler(S_Handler)What was in R0? User program may have been using this register. Therefore, cannot just use it - must first save it 20Full SWI HandlerS_Handler:SUB sp, sp, #4 leave room on stack for SPSR STMFD sp!, r0r12, lr store users gp registersMRS r2, spsr get SPSR into gp register
27、sSTR r2, sp, #14*4 store SPSR above gp registersMOV r1, sp pointer to parameters on stack LDR r0, lr, #4 extract the SWI number BIC r0,r0,#0 xff000000 get SWI # by bitmaskingBL C_SWI_handler go to handler (see next slide) LDR r2, sp, #14*4 restore SPSR (NOT “sp!”)MSR spsr_csxf, r2 csxf flagsLDMFD sp
28、!, r0r12, lr unstack users registers ADD sp, sp, #4 remove space used to store SPSR MOVS pc, lr return from handlergp = general-purposeSPSR is stored above gp registers since the registers may contain system call parameters (sp in r1)21C_SWI_Handlervoid C_SWI_handler(unsigned number, unsigned *regs)
29、 switch (number) case 0: /* SWI number 0 code */ break; case 1: /* SWI number 1 code */ break; . case 0 x100: puts(“SWI 0 x100 trigged!n”); break;. case XXX: /* SWI number XXX code */ break; default: /* end switch */ /* end C_SWI_handler() */spsr_svclr_svcr4r3r12r11r10r9r8r7r6r5r2r1r0Previous sp_svc
30、sp_svcregs12regs0 (also *regs)22Loading the Vector Table/* For 18349, the Vector Table will use the LDR PC, PC, * offset springboard approach */unsigned Install_Handler(unsigned int routine, unsigned int *vector) unsigned int pcload_instr, old_handler, *soft_vector; pcload_instr = *vector; /* read t
31、he Vector Table instr (LDR .) */ pcload_instr &= 0 xfff; /* compute offset of jump table entry */ pcload_instr += 0 x8 + (unsigned)vector; /* = offset adjusted by PC and prefetch */ soft_vector = (unsigned *)pcload_instr; /* address to load pc from */ old_handler = *soft_vector; /* remember the old
32、handler */ *soft_vector = routine; /* set up new handler in jump table */ return (old_handler); /* return old handler address */ /* end Install_Handler() */ Called as Install_Handler (unsigned) S_Handler, swivec); where,unsigned *swivec = (unsigned *) 0 x08;23 .text .align 2 .global triggertrigger:
33、STMFD sp!, lr SWI #0 x100 LDMFD sp!, pcextern void S_Handler();extern void trigger();int main() unsigned *swivec = (unsigned *) 0 x08; unsigned backup; backup = Install_Handler (unsigned) S_Handler, swivec); trigger(); Install_Handler (backup, swivec);Example: SWI Application24Exercise #3nWrite a se
34、rvice routine that receives a file name from a trigger and display the first lines of the file on the screen.lVoid service101(char *filename);nWrite a trigger that pass a file name as an argument to the above service routine through SWI #0 x101.lvoid trigger101(char *filename);nWrite a main program
35、to perform a demonstration.25OutlinenException Handling and Software InterruptsnELF: Executable and Linking FormatnARM Monitor and Program Loading26Introduction to ELFnExecutable and Linking FormatnDeveloped by Unix System Lab.nDefault binary format on Linux, Solaris 2.x, etcnSome of the capabilitie
36、s of ELF are dynamic linking, dynamic loading, imposing runtime control on a program, and an improved method for creating shared libraries.nThe ELF representation of control data in an object file is platform independent.27Three Types of ELF FilesnRelocatable fileldescribes how it should be linked w
37、ith other object files to create an executable file or shared library.nExecutable filelsupplies information necessary for the operating system to create a process image suitable for executing the code and accessing the data contained within the file.nShared object filelcontains information needed in
38、 both static and dynamic linking.28ELF File FormatnTwo views for each of the three file types.lLinking view and execution viewnThese views support both the linking and execution of a program.lLinking view is partitioned by sections.lExecution view is partitioned by segments.nThe ELF access library,
39、libelf, provides tools to extract and manipulate ELF object files.29ELF File Format (cont.)nLinking View Execution ViewELF headerProgram header table(optional)Section 1Section nSection header tableELF headerProgram header tableSegment 1Segment nSection header table(optional)30Example: readelfnWe can
40、 use “readelf” to output ELF informationnExampleluse “e” option to read all header from the executable file of “hello.c”$ cat hello.c/* hello.c, a simple example program */#define GREETING Hello, World!nint main() puts(GREETING);$ armelfgcc o hello.elf hello.c$ armelfreadelf e hello.elf31Example: EL
41、F HeaderELF Header: Magic: 7f 45 4c 46 01 01 01 61 00 00 00 00 00 00 00 00 Class: ELF32 Data: 2s complement, little endian Version: 1 (current) OS/ABI: ARM ABI Version: 0 Type: EXEC (Executable file) Machine: ARM Version: 0 x1 Entry point address: 0 x8100 Start of program headers: 52 (bytes into fil
42、e) Start of section headers: 168152 (bytes into file) Flags: 0 x202, has entry point, GNU EABI, software FP Size of this header: 52 (bytes) Size of program headers: 32 (bytes) Number of program headers: 1 Size of section headers: 40 (bytes) Number of section headers: 25 Section header string table i
43、ndex: 2232Example: Section HeaderSection Headers: Nr Name Type Addr Off Size ES Flg Lk Inf Al 0 NULL 00000000 000000 000000 00 0 0 0 1 .init PROGBITS 00008000 008000 000020 00 AX 0 0 4 2 .text PROGBITS 00008020 008020 0030e8 00 AX 0 0 4 3 .fini PROGBITS 0000b108 00b108 00001c 00 AX 0 0 4 4 .rodata P
44、ROGBITS 0000b124 00b124 000020 00 A 0 0 4 5 .data PROGBITS 0000b244 00b244 00092c 00 WA 0 0 4 6 .eh_frame PROGBITS 0000bb70 00bb70 000004 00 A 0 0 4 7 .ctors PROGBITS 0000bb74 00bb74 000008 00 WA 0 0 4 8 .dtors PROGBITS 0000bb7c 00bb7c 000008 00 WA 0 0 4 9 .jcr PROGBITS 0000bb84 00bb84 000004 00 WA
45、0 0 4 10 .bss NOBITS 0000bb88 00bb88 00010c 00 WA 0 0 4 11 .comment PROGBITS 00000000 00bb88 000288 00 0 0 1 12 .debug_aranges PROGBITS 00000000 00be10 000420 00 0 0 8 13 .debug_pubnames PROGBITS 00000000 00c230 000726 00 0 0 1 14 .debug_info PROGBITS 00000000 00c956 011f48 00 0 0 1 15 .debug_abbrev
46、 PROGBITS 00000000 01e89e 0031f4 00 0 0 1 16 .debug_line PROGBITS 00000000 021a92 002a14 00 0 0 1 17 .debug_frame PROGBITS 00000000 0244a8 000a14 00 0 0 4 18 .debug_str PROGBITS 00000000 024ebc 001406 01 MS 0 0 1 19 .debug_loc PROGBITS 00000000 0262c2 002be0 00 0 0 1 20 .stack PROGBITS 00080000 028e
47、a2 000000 00 W 0 0 1 21 .debug_ranges PROGBITS 00000000 028ea2 000150 00 0 0 1 22 .shstrtab STRTAB 00000000 028ff2 0000e3 00 0 0 1 23 .symtab SYMTAB 00000000 0294c0 001590 10 24 ef 4 24 .strtab STRTAB 00000000 02aa50 0007f9 00 0 0 1Key to Flags: W (write), A (alloc), X (execute), M (merge), S (strin
48、gs) I (info), L (link order), G (group), x (unknown) O (extra OS processing required) o (OS specific), p (processor specific)33Example: Program HeaderProgram Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align LOAD 0 x008000 0 x00008000 0 x00008000 0 x03b88 0 x03c94 RWE 0 x8000 Section t
49、o Segment mapping: Segment Sections. 00 .init .text .fini .rodata .data .eh_frame .ctors .dtors .jcr .bss 34Data RepresentationnSupport various processors with 8bit bytes and 32bit architectures.nIntended to be extensible to larger or smaller architecture.NameSizeAlignment PurposeElf32_Addr44Unsigne
50、d program addressElf32_Half22Unsigned medium integerElf32_Off44Unsigned file offsetElf32_Sword44Signed large integerElf32_Word44Unsigned large integerunsigned char11Unsigned small integer35ELF Header1nIt is always the first section of the file. nDescribes the type of the object file .nIts target arc
