1、CH.9 Design via Root LocusFigure 9.1a.possible design point via gain adjustment(A)design point that cannot be met via gain adjustment(B);需補償器設計9.1 Introduction Figure 9.1a.possible design point via gain adjustment(A)design point that cannot be met via gain adjustment(B);Figure 9.1 (b)responses from
2、poles at A and B9.1 Introduction 補償器種類補償器種類Figure 9.2 Compensationtechniques:a.cascade;b.feedback 9.2節:design of cascade compensation to improve ess 9.3節:design of cascade compensation to improve 暫態反應 9.4節:design of cascade compensation to improve both ess and 暫態反應 9.5節:design of feedback compensati
3、on9.2 cascade compensation to improve steady-state error改善 ess 補償器3種 1/S:1/S:idea integral compensator 理想積分器 ess=0 亦變 transient response Fig.9.3b (i.e.變根軌跡圖)K1+K2/S:PI controller(Proportional-plus-Integral)ess=0 可不變 transient response Fig.9.3c (S+Zc)/(S+Pc):Pc Zc Lag Compensator ess 可不變 transient re
4、sponseFigure 9.3a.root locusb.not on the root locus with 1/S compensator added此設計已無從獲致系統 A補償器 1/S:1/S:idea integral compensator ess=0 system type 增 1 ess=finite ess=0(缺點 active network)(缺點 變transient response)Figure 9.3 c.on root locus with PI compensator added當當 a a 甚小甚小 0不變不變 transient response PI
5、 controller 補償(S+a)/S:PI controller(Proportional-plus-Integral)ess=0=0 system type 增 1 可不變不變 transient responsetransient response 當當 a a 甚小甚小 Fig.9.3c (缺點 active network)(不變transient response)補償器(S+Zc)/(S+Pc):Pc Zc Lag Compensator暫態反應暫態反應 okay 希望調降穩態誤差希望調降穩態誤差暫態反應暫態反應 okay 維持維持P點點；Zc Pc 控制器控制器角度貢獻角度
6、貢獻 0Figure 9.4 Closed-loop system for Example 9.1:設計目標設計目標:希望 ess=0；不變 transient response(下頁說明控制器選擇)before compensationafter PI compensation改善 ess 補償器3種 (控制器選擇)1/S:1/S:idea integral compensator 理想積分器 ess=0 亦變 transient response Fig.9.3b (i.e.變根軌跡圖)K1+K2/S:PI controller(Proportional-plus-Integral)ess
7、=0 可不變 transient response Fig.9.3c (S+Zc)/(S+Pc):Pc Zc Lag Compensator ess 可不變可不變 transienttransient response responseFigure 9.5Root locus for uncompensated system of Fig.9.4(a)3 3階系統階系統Figure 9.6Root locus for compensatedsystem of Figure 9.4(b)Example 9.1Figure 9.7 time response PI compensated syst
8、em response and the uncompensated system response of Example 9.1設計目標設計目標:ess=0 不變 transient responseFigure 9.8PI controller1/11 1.未補償系統=0.174 根軌跡決定系統位置2.ess降低10倍 先求未補償系統的 ess Uncompensated system先畫根軌跡 找出系統現況2/11 Uncompensated system 找未補償系統的穩態誤差e()=1/(1+Kp)=0.108 Kp=lims0 G(s)=164.6/20=8.233/11改善 ess
9、 補償器3種 ()4/11 1/S:1/S:idea integral compensator 理想積分器 transient response Fig.9.3b (i.e.變根軌跡圖)K1+K2/S:PI controller(Proportional-plus-Integral)response Fig.9.3c (S+Zc)/(S+Pc):Pc Zc Lag Compensator response5/11e()=1/(1+Kp)=0.108 Kp=lims0 G(s)=164.6/20=8.23 ec()=0.0108由Gc(s)調整7/11Uncompensated system F
10、igure 9.12 Compensated system of Figure 9.11 8/11ec()=0.0108=1/(1+Kpc)Kpc=lims0 Gc(s)G(s)=lims0 Gc(s)Kp =lims0 Gc(s)8.23=91.593 lims0 Gc(s)=Zc/Pc=11.132Gc(s)=(s+Zc)/(s+Pc)取 Pc=0.01 Zc=0.111Table 9.1Predicted characteristics of uncompensated and lag-compensated systems for Example 9.29/11Figure 9.13S
11、tep responses of uncompensated and lag-compensated systems forExample 9.2 10/11 Figure 9.14Step responses of the system for Example 9.2 lag compensator 更趨近原點 反應較慢 最終之ess不變 11/11執行執行 Lag compensation 的相關公式的相關公式9.3 Improving Transient Response via Cascade Compensation改善 暫態反應 補償器3種 S:S:pure differentia
12、tor 純微分器 S+Zc:PD controller(Proportional-plus-Derivative)(S+Zc)/(S+Pc):Pc Zc Lead Compensator 超前補償器 Figure 9.15 Using PD compensation(S+Zc)改變暫態反應%OS不變 1/3a.uncompensated;pensator zero at 2;pensator zero at 3;pensator zero at 4Figure 9.16 time response 2/3 Uncompensated system and ideal derivative co
13、mpensation solutions from Table 9.2Table 9.2Predicted characteristics for the systems of Figure 9.15 3/3Example 9.3:S+Zc:PD controller Figure 9.17Feedback control system 1/7設計目標設計目標:補償後系統補償後系統%OS=16%OS=16%i.e.=0.504 tsc=ts/3Figure 9.18 Example 9.3 Root locus for uncompensated system 2/7先求未補償系統位置先求未補
14、償系統位置%OS=16%=0.504 次求次求未補償系統未補償系統 ts ts=4/(n)=4/1.205=3.32Figure 9.18 Example 9.3 Root locus for uncompensated system 2/7Figure 9.19 Compensated dominant pole superimposed over the uncompensated root locus for Example 9.3 3/7希望補償後希望補償後 dominant poles=-3.613 j6.192 Gc(s)G(s)=1800 目標目標設計 Gc(s)=S+Zc PD
15、 controller希望補償後希望補償後 tsc=3.32/3=1.107 (n)c=3.613%OS 不變 補償後補償後 dominant poles=-3.613 j6.192Figure 9.20 4/7Evaluating the location of the compensating zero for Example 9.3希望之角度補償希望之角度補償 S+Zc=1800 G(s)Figure 9.21Root locus for the compensated system of Example 9.3 5/7Figure 9.22 time response Uncompen
16、sated and compensated system step responses ofExample 9.3 6/7Table 9.3Uncompensated and compensated system characteristics for Example 9.3 7/7Figure 9.23PD controller S+Zc Example 9.4 Lead compensator design (S+Zc)/(S+Pc):Pc Zc設計目標設計目標:補償後系統補償後系統%OS=30%OS=30%i.e.=0.358tsc=ts/2Figure 9.26 uncompensat
17、ed and compensated dominant poleskG(s)=-1800 目標 Gc(s)+kG(s)=-1800 Gc(s)=(S+Zc)/(S+Pc)=c 超前控制器設計 選擇 Lead compensator 貢獻的角度Figure 9.25Three of the infinite possible lead compensator solutions Lead compensator 貢獻的角度(S+Zc)/(S+Pc):Pc Zc(S+Zc)/(S+Pc)=c 正值 超前控制器目標 Gc(s)G(s)=1800 超前控制器設計 選擇 Lead compensator
18、 貢獻的角度 Gc(s)=(S+Zc)/(S+Pc)=c Table 9.4 Comparison of lead compensation designs for Example 9.4Which is the best design?系統階數?是否有2個主要極點?是否有零點?能否抵消?比較規格達成度 確認最佳設計 Figure 9.28Compensated system root locus (which is this design?)Figure 9.29Uncompensated system and lead compensation responses forExample 9
19、.49.4 design of cascade compensation to improve both ess and 暫態反應 improve both 暫態反應 first then improve ess Example 9.5 自修改善 ess 補償器3種 1/3 1/S:1/S:積分器 ess=0 (S+a)/S:PI 控制器 ess=0 (S+Zc)/(S+Pc):Pc Zc Lag Compensator ess 控制器控制器設計原則設計原則:選 pole,zero 近原點近原點,維持暫態反應不變改善 暫態反應 補償器3種 S:S:微分器 S+Zc:PD 控制器 (S+Zc)/
20、(S+Pc):Pc Zc Lead Compensator同時改善 暫態反應 和 ess PID 控制器:(S+Zc)(S+a)/S Lag-Lead 補償器:(S+Zc)/(S+Pc)Lead (S+Zc)/(S+Pc)Lag 設計原則設計原則:先調暫態反應先調暫態反應 再調穩態誤差再調穩態誤差1.繪未補償系統根軌跡繪未補償系統根軌跡a.根軌跡條數根軌跡條數=3%OS=20%i.e.=0.456b.實軸上根軌跡實軸上根軌跡c.漸近線漸近線(3 zeros at )Ex.9.6 Fig.9.37%OS=20%i.e.=0.456Tsc=Ts/2 Ts=4/(n)essc=ess/10 kGH(
21、s)=-16/3 =/3；5/3 2/31.繪未補償系統根軌跡繪未補償系統根軌跡d.Breakaway point 1+kGH(s)=0 k(s)=-1/GH(s)dk/ds=0 s=-2.43;-8.24(不適用)e.trial-and-error GH(s)=-1800 find未補償系統 at s=-1.794 j 3.501 kGH(s)=1 k=192.12.先調暫態反應先調暫態反應f.補償後系統位置補償後系統位置 Ts=4/(n)=4/1.794 Tsc=Ts/2 (n)c=2(1.794)補償後系統補償後系統 at s=-3.588 j 7.003 3/34/52.先調暫態反應先
22、調暫態反應 g.Lead 補償器 GcL(s)設計 補償後系統 at s=-3.588 j 7.003 GcL(s)角度貢獻 GcLGH(s)=-1800 GcL(s)=-1800-GH(s)=-1800 (-164.650)=-15.350 GcL(s)=(S+Zc)/(S+Pc)Pc Zc 選 Zc=6 Pc=29.1 k GcL(s)GH(s)=1 k=19773.後調穩態誤差後調穩態誤差 essc=ess/10 ess=1/Kv Kv=lims0 skGH(s)=192.1/60 ess=1/Kv=60/192.1 h.Lag 補償器 GcLag(s)設計 經 Lead 補償後系統 at s=-3.588 j 7.003 Lag 補償器 需維持 system at s=-3.588 j 7.003 且降 essc=ess/10=60/1921 k GcLag(s)GcLGH(s)Type1系統 GcLag(s)=(S+Zc)/(S+Pc)Pc Zci.e.Kvc=lims0 s GcLag(s)kGcLGH(s)=1921/60 lims0 GcLag(s)=(Zc/Pc)(1977/291)=1921/60
