1、 68HC11 instruction set A quick look at the programming procedure The programmers model Instruction types and formats Addressing modes A tour of the instruction set Readings for instruction set:o Spasov,Chap.2 and Appendix Ao HC11 Reference Manual,Appendix Ao HC11 Programming Reference GuideSEGMENT
2、code Soon youll write programs in assembly language for the HC11 Heres a super simple example program:;Super simple test program ORG$B600TLOOP:INCAINCB JMP TLOOP Before the HC11 can run this program,o The assembly-language code needs to be converted to machine language,and the machine-language code
3、needs to be transferred to the HC11s memoryCont.Here is the machine code that results from the assembly-lang.program given aboveAddressContents$B60001001100$B601 01011100$B602 01111110$B603 10110110$B604 00000000Cont.Cont.try1.asm is a source fileoIt is created by you,the programmer,using a text edi
4、tor on your PCoFormat:HC11 assembly language(ASCII text)try1.lst is a listing fileoIt is created by AS11.exe,the assembler/linker that runs on your PCo(Youll probably run AS11.exe from DevHC11.exe)oIts purpose of the file is to help you debug the program Format:ASCII text try1.s19 is an object fileo
5、It is created by AS11.exe,the assembler/linkeroIts purpose is to specify what bytes should be downloaded to the HC11,and to what locations in HC11 memoryoFormat:Motorola S-record(ASCII text)oSometimes this is called a hex file The object file is converted to executable machine codeoThe machine code
6、is created by DevHC11.exe,the development environment that runs on your PCCont.oIts purpose is to provide instructions and data to the HC11 Format:HC11 machine language(binary)oSometimes this is called the binary codeoThe machine code is transferred to the HC11 through the coordinated efforts of Dev
7、HC11.exe(running on your PC)and the Buffalo monitor program(running on the HC11)What features of the processor are most important to the assembly-language programmer?oRegister setoMemory organizationoInstruction setoAddressing modes Here is the register set(again):Cont.Cont.AccumulatorsoA:8-bit gene
8、ral purpose accumulatoroB:8-bit general purpose accumulatoroD:Double accumulator(concatenation of A and B for 16-bit operations)Most operations can be done using either accumulator A or B Index registersoX:16-bit index registeroY:16-bit index register X and Y are used for indexed addressingX is pref
9、erred,usually,because addressing with Y is slower and takes 1 extra byte of object code than with XOperations on index registers:oSimple operations(INC,DEC,and ADD from B)can be performed oMore complex operations are done by exchanging the index register and the D register,doing some computation,and
10、 then exchanging the values again oX or Y is often loaded with the base address of the I/O register address space($1000)Cont.SP:16-bit stack pointer Stack may be anywhere in the 64 Kbyte address space The stack grows downward in memory(i.e.,a push decrements SP)Cont.Cont PC:16-bit Program Counter CC
11、R:-bit Condition Code RegisteroH,N,Z,V,C:rithmetic status bits N:Negative result Z:Zero result V:Overflow result C:Carry out from operation H:Carry from low nibble(4 bits)of accumulatoroS:Stop bit disabled =1 disables STOP instruction=1 after processor resetoI:Interrupt mask=1 masks all maskable int
12、errupts(not XIRQ)=1 after processor reseto X:XIRQ interrupt mask=1 masks XIRQ=1 after processor reset(must be cleared just after reset)The instruction set specifies the kinds of data transfers and transformations that can occur in the machine Instructions can be grouped into 5 broad categoriesoData
13、transfers:instructions that move data to and between registersoLogical:instructions that perform logic operations on data-AND,OR,etc.oArithmetic:addition,subtraction,increment,etc.oFlow control:instructions that change the sequence of execution of a program-conditional and unconditional branches,sta
14、ck operations,etc.oInput/Output operationsCont.An instruction generally consists of an opcode and some operand(s)HC11 instructions are of different lengths(1 to 5 bytes)The instruction set is summarized in Table A.1 of the text,Appendix A of the HC11 Reference Manual,and M68HC11 E Series Programming
15、 Reference Guide oLists instruction mnemonic,brief description of the operation,addressing modes available,machine code format of the instruction,timing information,and effect on condition code registersCont.Cont.Opcode constructionoIn general,an n-bit opcode is capable of specifying any one of 2n i
16、nstructions oWith 8-bit opcodes,256 distinct instructions are possibleo68HC11 has more than 300 actual instructions 145 basic instructions plus“addressing variations”1 or 2 bytes of storage specify the opcode!1-byte opcodesoMost opcodes use just 1 byteoDownward compatible with 6801Cont.2-byte opcode
17、soMost 2-byte instructions deal with register Y,which was not present in the 6801 processor oIt takes longer to fetch and execute 2-byte opcodesoNew instructions use a pre-byte,which signals that another opcode byte follows:$18,$1A,or$CDEx.INX$08 INY$18$08Cont.Instruction formatoAn instruction is ma
18、de up of an opcode and a set of operands Opcode may be one or two bytes Instructions may use 0,1,2,or 3 operandsOperands may be 1 or 2 bytesoInstruction lengths range from 1 to 5 bytes oExample(assume this is stored at address$E000):LDAA#$FF;load ACCA with the;Value$FFMachine code:$E000$86$E001$FFCo
19、nt.Fetch/Execute operation:LDAA#$FFFirst clock cycleCont.Fetch/Execute operation:LDAA#$FFSecond clock cycle How does the instruction specify the location of data?The HC11 supports 5 different addressing modesoInherent Addressing Operands are specified implicitly in the opcode itself Operands are con
20、tained in the registers instead of memory Instruction length:or 2 bytes Examples:Register increment,clearsCLRARegister shift operationsASLARegister additionsABACont.How does the instruction specify the location of data?The HC11 supports 5 different addressing modesoInherent Addressing Operands are s
21、pecified implicitly in the opcode itself Operands are contained in the registers instead of memory Instruction length:or 2 bytes Examples:Register increment,clearsCLRARegister shift operationsASLARegister additionsABACont.Immediate addressing One operand is included as part of the instruction word O
22、ther operand(if needed)comes from an implied register Instruction length:2-4 bytes Specified operand is a constant and cannot be altered at run time Mode is denoted by a#before the operand value Example:LDAA#$05$86$05Cont.Direct addressing The operand included in the instruction word is a memory add
23、ress,specifying where the data is located Second operand is an implied register Instruction length:2-4 bytes Since an address is specified,the data value itself can be changed during program executionAddress is a constant Address included in the instruction word is only 1 byteDirect addressing can o
24、nly be used to reference locations$0000-$00FF-256 locationsExample:LDAA 05$96$05Cont.Extended addressing Same as direct addressing,but with 2 bytes of address-the full range of addresses can be specified($0000 to$FFFF)Instruction length:3 or 4 bytes Example:LDAA$0005$B6$00$05 Why have both modes?Con
25、t.Indexed addressingThe effective address of the data in memory is computed as the sum of the value contained in an index register(X or Y)and an offset(contained in the instruction word)The offset is a 1-byte unsigned quantity Useful for table and array accessEg.DAA$56,X$A6 56Cont.1.Relative address
26、ing1.Similar to indexed addressing uses PC value instead of the value in X or Y2.Instructions offset value is added to the value in the program counter to give the address of the next instruction3.Used to specify branch addresses resulting from jump commands4.Offset is an 8-bit 2s complement number-
27、ranges from-128 to+127 decimal Load InstructionsTransfer data from memory to registerLDAA,LDAB,LDD,LDX,LDY,LDSDifferent addressing modes supportedAssume the following memory contents:0050 40 41 42 43 44 45 46 47-48 49 4a 4b 4c 4d 4e 4f2000 50 51 52 53 54 55 56 57-58 59 5a 5b 5c 5d 5e 5fLDAA#$56;ACCA
28、$56(immediate)LDAB$56;ACCB=$46(direct)LDAA$2000;ACCA=$50(extended)LDD$2002;ACCD=$5253(extended)Cont.;CCA=$52,ACCB=$53 LDX#$2000;IX=$2000(immediate)LDAA$C,X;ACCA=$5C(indexed)LDY#$56;IY=$56(immediate)LDAB 0,Y;ACCB=$46(indexed)LDX$5,X;IX=?(indexed)o Store Instructionso Transfer data from register to me
29、mory o STAA,STAB,STD,STX,STY,STSo Direct,extended,or indexed addressing No immediate addressingCont.Transfer InstructionsoTransfer data from register to register TAB;ACCA ACCBTBA;ACCB ACCATAP;ACCA CCRTPA;CCR ACCATXS;IX SPTSX;SP IXTYS;IY SPTSY;SP IYXGDX;IX ACCDXDGY;IY ACCDCont.Increment Instructions
30、INC oprINCA INCB INX INY INS Decrement InstructionsDEC oprDECA DECB Cont.DEX DEY DES Clear InstructionsCLR oprCLRARotate Instructionso Shifts all 8 bits plus the Carry bit circularly one position.ROL oprROLAROLBCont.ROR oprRORARORBNote:9 rotates puts data back in original position(not 8 as stated in
31、 text)Rotate InstructionsExampleAssume C=1,ACCA=$3BCont.Shift Instructionso Logical ShiftsLSL oprLSLALSLBLSLDLSR oprLSRALSRBLSRDCont.Shift Instructionso Arithmatic ShiftsASL oprASLAASLBASLDASR oprASRAASRBASRDCont.ASR preserves sign bit ASL/ASR can be used to multiply/divide by 2 What is the differen
32、ce between ASL and LSL?Logical InstructionsoBit-wise ANDANDA oprANDB oproBit-wise ORORA oprORB oproBit-wise Exclusive-OREORA oprEORB oprCont.o1s ComplementCOM oprCOMACOMB Arithmetic InstructionsoAdd instructions ABA;ACCA+ACCB ACCAADDA opr;ACCA+M ACCAADDB opr;ACCB+M ACCBADDD opr;ACCD+M ACCDADCA opr;A
33、CCA+M+C ACCACont.ABX;IX+ACCB IX ABY;IY+ACCB IYoSubtract InstructionsSBA;ACCA-ACCB ACCASUBA opr;ACCA-M ACCASUBB opr;ACCB-M ACCBSUBD opr;ACCD-M ACCDSBCA opr;ACCA-M-C ACCASBCB opr;ACCB-M-C ACCBCont.1.Arithmetic Instructions1.Unsigned arithmetic1.Numbers range from$00 to$FF(0 to 255)2.The carry bit(C)is
34、 set if result is outside range2.Signed arithmetic1.Numbers range from$80 to$7f(-128 to+127)2.The overflow bit(V)is set if result is outside range3.The negative bit(N)is set if result is negative(same as MSB of result)Cont.Arithmetic instructionsoThe same instructions are used for both signed and un
35、signed arithmetic oThe CPU does not care whether the values are signed or unsigned The arithmetic result is the same for both cases C,V,and N bits are set based on Boolean combinations of the operands Programmer must keep track of whether values are signed or unsigned Whether to use the C or V bit t
36、o check for overflowCont.Arithmetic InstructionsoExample:oAdd$56+$B0oUnsigned:$56+$B0=$106(86+176=262)oSigned:$56+$B0=$06(86+(-80)=6)LDAA#$56 LDAB#$B0ABA;ACCA=$06,C=1,V=0oExample:oAdd$56 to$60 oUnsigned:$56+$60=$B6(86+96=182)oSigned:$56+$60=$B6(86+96=-74!)Cont.LDAA#$56LDAB#$60ABA;ACCA=$B6,C=0,V=1 Mu
37、ltiplicationoMUL instruction oMultiplies 8-bit unsigned values in ACCA and ACCB,then puts the 16-bit result in ACCD oNote that this overwrites ACCA and ACCB!oIf youre multiplying by a power of 2,you may want to use ASL instructions instead Why?Cont.1.Binary FractionsoMultiplying two 8-bit numbers gi
38、ves 16-bit result.What if you only want 8 bits?oDifferent ways to interpret 8-bit numbers1.Unsigned integers 0 2552.Signed integers-128-+1273.Binary fractions 0-1 1.$00=0/256=0 2.$80=128/256=0.5 3.$FF=255/256=0.9961oYou can use the ADCA instruction after a MUL to convert 16-bit result to 8-bit binar
39、y fraction1.MUL sets C to 1 if bit 7 of ACCB is 1Cont.Binary Fractions oExample:Multiply$20 x$35(32 x 53 in decimal)Unsigned integers:$20 x$35=32 x 53=1696=$6A0 LDAA#$20 LDAB#$35 MUL;ACCD=$06A0,C=1 ;ACCA=$06,ACCB=$A0Binary fractions:(32/256)x(53/256)=1696/65,536Cont.=6.625/256=7/256 LDAA#$20LDAB#$35
40、 MUL;ACCD=$06A0,C=1 ADCA#$00;now ACCA=$07 Integer DivisionoIDIV Divides 16-bit unsigned integer in ACCD by 16-bit unsigned integer in IXPuts quotient in IX,remainder in ACCDoExample:6/4 Cont.LDD#$6;ACCD=$6 LDX#$4;IX=$4 IDIV;IX=$1,ACCD=$2oNote:IDIV takes 41 cycles to executeYou can use ASR instructio
41、ns to divide by powers of 2o Only gives you the quotient,not the remainderoDivide by zero IX set to$FFFF,C set to 1 Fractional DivisionoFDIV Divides 16-bit binary fraction in ACCD by 16-bit fraction in IX 16-bit values between 0 and 1Cont.16-bit values between 0 and 1Puts quotient in IX,remainder in
42、 ACCDOften used to convert remainder from IDIV into a fraction Example:6/4 LDD#$6 LDX#$4 IDIV ;IX=$1,ACCD=$2 STX Somewhere;store quotient LDX#$4 ;reload denominator FDIV ;IX=$8000,ACCD=$0 ;(Note$8000=0.5)Cont.1.Floating point numbers1.Used to increase the range of number representation past that of
43、integer formats2.Due to 8-bit CPU,IEEE floating point standard is not supported on the HC113.Motorola has a non-standard format4.Floating point routines can be downloaded from the Motorola web site if you need these for projects(you will not need them for the labs)2.CCR OperationsCLC;clear the C bit
44、CLV;clear the V bitSEC;set the C bitSEV;set the V bitCont.oCan use SEC and CLC to set up the C bit prior to rotate instructions,for example“No Operation”Instruction NOPoDoes nothing but increment the PCoWhy would you need this?Compare InstructionsoCompares two registers,or a register and a memory lo
45、cation/immediate value Subtracts the two valuesoSets N,Z,V,C condition codes oDoes not change operandsCont.CBA;ACCA-ACCB CMPA opr;ACCA-M CMPB opr;ACCB MCPD opr ;ACCD-M CPX opr ;IX-M CPY opr ;IY-MCan be used to check if two values are equal,greater than/less than,etc.Often used before conditional bra
46、nch instruction Compare Instructions Example:Assume the 16-bit value$5100 is stored at memory location$2000:LDAA#$50Cont.Bit Set/Clear InstructionsoUsed to set or clear multiple bits in a memory locationBSET opr mask BCLR opr mask o1s in mask specify which bits are set or cleared.Other bits are unaf
47、fected.oExample:Assume IX=$20,memory location$34 contains the value$1A BSET$14,X$31;now location$34=$3BBCLR$34$1C;now location$34=$23 Bit Test InstructionsCont.1.Bit Test Instructions1.Performs logical AND and modifies condition codes N and Z(V is always cleared,C is unaffected)2.Does not modify the
48、 operands 3.BITA opr4.BITB opr5.Example:Assume location$2000 contains the value$1A 6.LDAA#$3F 7.LDAB#$05 8.BITA#$03;N=0,Z=0 BITB$2000 9.;N=0,Z=1Cont.Flow control with looping and branchingoFlow control is the process ofMaking decisionsPerforming operations in sequence Repeating identical operations
49、Fig 2.21 Flow control mechanismsCont.Relative addressing oOffset is added to the PC to cause the branch o8-bit offset Range is-128 to+127 oDestination address is actually relative to the address following the branch instructionWhy?oCalculating destination addresses:PCnew=PCold+T+relPCold is address
50、of branch instructionPCnew is destination address rel is the relative addressT is 2 for most instructionsCont.oT=4 for BRCLR,BRSET with indexed addressing using IXoT=5 for BRCLR,BRSET with indexed addressing using IY Relative addressing oThe assembler usually handles the calculation of relative addr
