课件:数字逻辑6-1(1).ppt

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1、Chapter 6Sequential control design principlesIntroduction for Sequential designStructure of latch and its analyzesIntroduction for sequential control Combinational logic design:Combine some circuit units to fulfill a given logic based by a truth table.Target:low cost,high speed.Introduction for sequ

2、ential control Sequential control design:Detect and control data or state change in the circuit,arrange its operational sequence.Target:high frequency high efficientIntroduction for sequential control Each input state decide its output state;when input changed,the output should be changed.Each unit

3、have its time delay,output sampling time should be controlledIntroduction for sequential controlCircuit unit may have many delay paths,output state maybe never stable Introduction for sequential controlIntroduction for sequential controlIntroduction for sequential control State changed from input to

4、 outputIntroduction for sequential control Pipeline design:cut the chain into pipe by registersIntroduction for sequential control Data transfer controlIntroduction for sequential control Synchronous system designBistable elementA positive feedback circuit made by two inverters.State(Q)can be hold,b

5、ut cannot be set!S-R latchwhen both S and R is(00),the state hold!When SR=(10)Set:set Q=1When SR=(01)Reset:set Q=0Sequential analyze for S-R latchInitial state:Q=0Last state:Q=1Initial state:Q=0Last state:metastableSequential analyze for S-R latchInitial state:Q=0 QN=0Last state:Q=?QN=?MetastableSeq

6、uential analyze for S-R latchSummery of S-R latchNeed a minimum-pulse-width tpw(min)!S-R latch with enableUse AND gates to control the inputsWhen C=1,it is a normal S-R latch;When C=0,both inputs are cut off(0),and the state is hold!The input pulse may be cut off by control signal!Sequential analyze for S-R latch

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