1、Chapter 8Sequential logic design practices Design with IC blocks:DFF and JKFFDFF Blocks 4 DFF6 DFF8 DFFJKFF Blocks Design with IC blocksDesign with IC blocksDesign with IC blocksQKQJQ*JQQ*0*1KQQBasic unit：Mode 2 counter*QQD Binary counterRipple Binary counter Binary counterRipple Binary counter Bina
2、ry counterControl and final stateAscending up Descending down Binary counterMode N*M counter Binary counterMSI Counters Input portENP:enable for state changeENT:enable for state change When ENT=0,RCO=0Output portInitial state:0000 final state:1111ROC:final state=1MSI Counters Other MSI Counters 74x1
3、61:mode 16 binary counter with synchronous CLR Initial state:0000 Final state:1111 74x160:mode 10 counter with binary code and asynchronous CLR Initial state:0000 Final state:1001 74x162:mode 10 counter with binary code and asynchronous CLR Initial state:0000 Final state:1001 Last state:ROC=1up/down=1:upInitial state:0000 Last state:1111 up/down=0:downInitial state:1111 Last state:0000Last state:RCO=0!Other MSI Counters The applications of MSI counters Mode 16 counter Initial state:0000 Final state:1111
