1、Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.Chapter 14:Nonlinearity and Mismatch14.1 Nonlinearity14.2 Mismatch Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribut
2、ion without the prior written consent of McGraw-Hill Education.2Nonlinearity:General Considerations Nonlinear characteristic deviates from a straight line as the input swing increases E.g.,Common-source stage or differential pair Copyright 2017 McGraw-Hill Education.All rights reserved.No reproducti
3、on or distribution without the prior written consent of McGraw-Hill Education.3Nonlinearity:General Considerations Nonlinear input/output characteristic can be approximated by a polynomial in the range of interest For small x,y(t)1x,indicating that 1 is the small-signal gain in the vicinity of x 0 C
4、opyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.4Nonlinearity:General Considerations Nonlinearity can be quantified by specifying maximum deviation of characteristic from an ideal one For voltage range
5、 of interest 0,Vin,max,pass straight line through end points of actual characteristic and obtain maximum deviation V Normalize to maximum output swing Vout,max 1%nonlinearity for an input range of 1 V means Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution with
6、out the prior written consent of McGraw-Hill Education.5Nonlinearity:General Considerations Nonlinearity can also be characterized by applying a sinusoid at input and measuring harmonic content of output If then Magnitude of nth harmonic grows roughly in proportion to nth power of input amplitude Qu
7、antified by summing the power of all harmonics except fundamental and normalizing to power of fundamental,metric called as“total harmonic distortion”(THD)For a third-order nonlinearity,Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written
8、consent of McGraw-Hill Education.6Nonlinearity of Differential Circuits Differential circuits exhibit“odd-symmetric”characteristic Even-order terms 2j in polynomial must be zero:Differential circuit driven by a differential signal produces no even harmonics Consider two amplifiers providing equal sm
9、all-signal voltage gain of Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.7Nonlinearity of Differential Circuits If an input Vmcost is applied to each circuit,for common-source stage,Amplitude of sec
10、ond harmonic normalized to fundamental is For the differential pair,it can be shown that If ,then Differential pair exhibits much less distortion for same gain and output swing,at the cost of higher power Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution withou
11、t the prior written consent of McGraw-Hill Education.8Effect of Negative Feedback on Nonlinearity Expected that negative feedback would yield higher linearity for a closed-loop system Consider a“mildly nonlinear”system below Assume core amplifier has an input/output characteristic Apply a sinusoidal
12、 input postulating that output contains a fundamental and second harmonic approximated as Through simple analysis,we can get Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.9Effect of Negative Feedbac
13、k on Nonlinearity Small nonlinearity means 2 and b are small quantities,so that and hence b can be found as Normalize amplitude of second harmonic to that of fundamental Without feedback,this ratio would be Negative feedback reduces relative second harmonic by a factor of and gain by Copyright 2017
14、McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.10Effect of Negative Feedback on Nonlinearity Feedforward amplifier in a feedback system suffers from gain error For a feedforward gain A0 and feedback factor,relative
15、 gain error is approximately 1/(A0)Possible to derive a relationship between gain error and maximum nonlinearity of overall feedback circuit In above fig.,nonlinearity is always less than gain error Choose high open-loop amplifier gain so that to guarantee Copyright 2017 McGraw-Hill Education.All ri
16、ghts reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.11Capacitor Nonlinearity For a linear capacitor,while for a voltage-dependent capacitor Total charge on a capacitor sustaining a voltage V1 is Charge depends on“history”of voltage rather than ins
17、tantaneous value Express each capacitor as Consider noninverting amplifier below At the start of amplification mode,C1 has a voltage of Vin0 and C2 a voltage of zero Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-H
18、ill Education.12Capacitor Nonlinearity Assuming where M is the nominal closed-loop gain,charge across C1 is Similarly,if ,charge across it at the end of amplification mode is Equating Q1 and Q2 and solving for Vout,For and for small 1,Second term represents nonlinearity resulting from capacitor volt
19、age-dependence Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.13Nonlinearity in Sampling Circuits On-resistance of MOS switches varies with input and output levels NMOS switch in Fig.(a)exhibits risi
20、ng resistance as Vin and Vout increase Complementary topology of Fig.(b)displays varying equivalent resistance as Vin and Vout go from 0 to VDD Ron reaches a peak here due to dependence of mobility on the vertical field in the channel Copyright 2017 McGraw-Hill Education.All rights reserved.No repro
21、duction or distribution without the prior written consent of McGraw-Hill Education.14Nonlinearity in Sampling Circuits We apply a large sinusoid to the input,where V0=VDD/2 and seek harmonics at the output First assume resistance is linear and write output as In practice,bandwidth must be large enou
22、gh to negligibly attenuate the signal,i.e.,so that Assume this expression holds for the nonlinear circuit if Ron is represented properly Phase shift from input to output varies as Vin and Vout vary,creating distortion Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distri
23、bution without the prior written consent of McGraw-Hill Education.15Nonlinearity in Sampling Circuits For a periodic input,Ron also varies periodically and can be approximated by a Fourier series For a roughly symmetric behavior of Ron,the time-domain behavior below is observed where Ron varies at t
24、wice the input frequency Thus,Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.16Nonlinearity in Sampling Circuits For cosine terms with arguments much less than 1 rad,If only first two harmonics are r
25、etained,then In a differential sampling switch,even-order harmonics are suppressed Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.17Linearization Techniques Principle behind linearization is to reduc
26、e dependence of circuits gain on input level Make gain relatively independent of bias currents Simplest method is by means of a linear resistor Overall transconductance of degenerated CS stage is For large gmRS,this approaches 1/RS,an input-independent value Copyright 2017 McGraw-Hill Education.All
27、rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.18Linearization Techniques Differential pair can be degenerated as shown in Figs.(a)and(b)In Fig.(a),degeneration resistors consume headroom of ISSRS/2 Circuit of Fig.(b)does not have this issu
28、e but suffers from higher noise and offset voltage Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.19Linearization Techniques Degeneration resistor can be replaced by a MOSFET operating in deep triode
29、 region Fig.(a)For large input swings,M3 may not remain in deep triode Vb must track Vin,CM so that Ron is defined accurately Fig.(b)shows more a practical solution where M3 and M4 are in deep triode for Vin=0 As VG1 VG2,M3 stays in triode since VD3=VG3 VGS1 M4 eventually enters saturation since VD4
30、 rises whereas VG4,VS4 fall(a)(b)Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.20Linearization Techniques MOSFET operating in triode region can provide a linear ID/VDS characteristic if VDS is held
31、constant This technique employs amplifiers A1 and A2 with cascode devices M3 and M4 to force VX and VY to be equal to Vb for varying input levels gm1=gm2=is small since VDS must be low to ensure M1,M2 remain in triode region Vin,CM must be tightly controlled to track Vb to define ID1 and ID2 Copyrig
32、ht 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.21Linearization Techniques Another approach to linearization:“post-correction”View the amplifier as a cascade of voltage-to-current(V/I)converter and a current
33、-to-voltage(I/V)converter If the V/I converter can be described as and the I/V converter as ,then Vout is a linear function of Vin,for e.g.Figs.(a),(b),(c)Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Educati
34、on.22Linearization Techniques Possible to linearize differential pair further by adding local feedback Sense output voltage by means of M3 and M4 and return a proportional current to the sources of M1 and M2 Assume circuit is symmetric and I1=I4 Ignoring CLM and body-effect,ID1=I3 and ID2=I4 regardl
35、ess of the input signal Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.23Linearization Techniques Input transistors maintain a constant VGS as Vin=Vin1 Vin2 varies Current through RS(Isig)must be pro
36、vided only by M3 and M4,we have Output voltage of this topology can be found to be Large number of devices in signal path produce significant noise Dependence of rO upon VDS in short-channel devices introduces some nonlinearity Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction
37、 or distribution without the prior written consent of McGraw-Hill Education.24Mismatch Nominally-identical devices suffer from finite mismatch due to uncertainties in manufacturing process Gate dimensions of MOSFETs suffer from random,microscopic variations and introduce mismatches between two trans
38、istors identically laid out MOS devices exhibit VTH mismatches since VTH is a function of doping levels in the channel and gate which vary randomly Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.25Mi
39、smatch Study of mismatch consists of two steps:Identify and formulate the mechanisms leading to mismatch between devices Analyze the effect of device mismatches upon the performance of circuits For a MOSFET in saturation,Mismatches between,Cox,W,L,and VTH result in mismatches between IDs(for a given
40、 VGS)or VGSs(for a given ID)of two nominally-identical transistors Intuitively,as W and L increase,their relative mismatches W/W and L/L,i.e.,larger devices exhibit smaller mismatches Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written c
41、onsent of McGraw-Hill Education.26Mismatch All mismatches decrease as the area,WL increases As WL increases,random variations experience greater“averaging”,falling in magnitude For the above case,L2 L1 because if the device is viewed as many smaller parallel transistors,each with width W0,equivalent
42、 length is Overall variation is given by L0 is the statistical variation of length of a transistor with width W0 Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.27Mismatch Cox and VTH suffer from less
43、 mismatch if device area increases A large transistor can be decomposed into a series and parallel combination of small unit transistors with dimensions W0 and L0,each exhibiting(Cox)j and VTHj These experience greater averaging as number of unit transistors increases AVTH and AK are proportionality
44、 factors Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.28Effect of Mismatch Mismatches lead to three distinct phenomena:DC offsets Finite even-order distortion Lower common-mode rejection DC Offsets
45、:In differential pair of Fig.(a),with Vin=0 and perfect symmetry,Vout=0 but with mismatches Vout 0 Circuit suffers from a“dc offset”equal to the observed value of Vout when Vin is set to zero Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior w
46、ritten consent of McGraw-Hill Education.29Effect of Mismatch More meaningful to specify input-referred offset voltage,defined as the input level that forces the output to go to zero Note that If a differential pair is to amplify a small input voltage,output contains amplified replicas of both the si
47、gnal and the offset In a cascade of direct-coupled amplifiers,the dc offset may experience so much gain that it drives the latter stage into nonlinear operation Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill E
48、ducation.30Effect of Mismatch DC offset also affects the precision with which signals can be measured If an amplifier is to determine whether the input signal is greater or less than a reference,VREF,then the input-referred offset imposes a lower bound on the minimum Vin VREF that can detected relia
49、bly Input-referred offset voltage of a differential pair can be found as More accurately,Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.31Effect of Mismatch Even-Order Distortion:Mismatches introduce
50、 finite even-order nonlinearity in differential circuits If the two signal paths in a differential circuit are represented by and llllll the differential output is given by For ,this reduces to Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior
