1、DisplayPort Derivatives:eDP and MyDPandConsiderations of Physical Layer TestTopicsDisplayPort Technology eDP and MyDP CapabilitiesTesting ConsiderationsSomething Good is HappeningMyDPStandard DisplayPortComputingeDPEmbedded SystemsConsumer ElectronicsPortablesVESA:200 members strong!DisplayPort Tech
2、nology RolloutsConfidentiality LabelMay 10,20134MyDPDP1.2iDP 1.0DP1.0DP1.1eDP 1.01.21.31.41/2013DP1.3Today1.0CTS ReleasedSpecification Released4/2013Standard DP5/20127/20135/2012 12/2012Quick SummaryStandard DisplayPorteDPMyDPCapabilitiesNoteworthy FeaturesCompeting TechnologyP1,2,or 4 lanes Four Se
3、ttings for Lvl and Pre-emph SSC3 bit ratesH D M I D V I?VGA?Integrable in low geometry silicon.Dominating in PCs now.1,2,or 4 lanes Multi-Level Pre-emph SSCMulti bit ratesLVDS MIPILow Power rivals MIPI.High data rates supported now.Attributes similar toDP1 laneFour LevelsPre-emphasis SSC3 bit ratesM
4、HL1080p/60 24 bit color achieved.Many connection models.Attributes same as DWhy Successful?2 0 0 member companies participating Original DP foundational principles serving DP extensions C o n s u m e r focus in handling Legacy designs Interoperability Program/Self testing/Compliance testing K n o w
5、l e d g e a b l e and Aggressive leadersCraig WileyParade TechnologiesAlan Kobayashi ST MicroKey Features of DisplayPortHot Plug DetectTransmitterAUXReceiver(Sink)A U X ChannelVery robust channel Setup Link/Maintain Link Test Assistance uPacket BasedNot based on Raster timings Fixed bit rates Physic
6、al Layer Features Multiple Bit rates Multiple LevelsMultiple Pre Emphasis Settings Spread Spectrum ClockingActive VideoBlanking AreaDisplayPort LinkThe AUX Channel enables Link setup and maintenance as well as control for testing.TxDriverLogicDecodeMain LinkAUXHot Plug DetectImage bufferEDIDDPCDSink
7、LogicBit Recovery LockImage Frame bufferDisplayErrAUX CHComAUX Channel Implementation Manchester II SignalingMyDP:Portable TVPortable Get a pic of U-Tube or NetflicksIn the Future:Wireless from your portableToday:MyDP ConnectivityMy Entertainment SystemYour Entertainment SystemTransmission Requireme
8、nts4k x 2k?No Way!Not Yet AnywayUsing HDMI transmission as a benchmarkDisplay Technologies Available:DisplayPort:Maximum Lane Rate-5.4Gbs HDMI:Maximum Lane Rate-3.4GbsTiming1080i/720p1080p/8bit1080p/10bitLane Bit Rate750Mbs1.50Gbs1.87GbsPixel Rate75MPs150MPs187MPsComposite Bit Rate2.23Gbs4.46Gbs5.57
9、GbsLets Look CloserFor both MHL and MyDP the uUSB connector is the de facto connector,but it is not find it mentioned in either standard!D-and D+is the differential data laneID:USB mode detectConclusion:There is only one data lane through which the composite data rate must be conveyed.So the composi
10、te bit rate rate is the metric.5 PinsGetting down to One data lane5 Pins1 datalane4 data lanesAUX+/-,HPDConfig1/21 lowMyDP speed lineDisplayPort20 PinsPower,GroundPower,GroundHDMIMyDPuUSBHDMISpec Released:1.0Compliance Testing starting:June 2013Maximum Data Rate:5.4Gbs to support 1080p/60HzuUSBVGAMy
11、DP One could say that MyDP is not very new!It is just one lane DisplayPort!There are other changes to get to 5 pin interface,but nothing changes in the high speed signaling.S u b s e q u e n t slides will be paired;the first to show the standard DisplayPort attributes and the next those for MyDP.Dis
12、playPort TechnologyHot Plug Detect(Interrupt Request)1 to 4 unidirectional high speed lanes Fixed data rate independent of display raster(refresh)Auxiliary channel for link communication and auxiliary data flow-Link Setup and Maintenance(1Mb/s-Manchester II)-USB 2.0 Transport(Fast AUX-540Mb/s-standa
13、rd 8b/10b)Auto detect of cable plug/unplugSource DeviceSink DeviceDisplayPort TransmitterDisplayPort ReceiverMain Link(Isochronous streams)AUX ChLink/Device ManagementFAUX:USB2.0 transportMyDP Technology 1 to 4 unidirectional high speed lanes Fixed data rate independent of display raster(refresh)Aux
14、iliary channel for link communication and auxiliary data flow-Link Setup and Maintenance(1Mb/s-Manchester II)-USB 2.0 Transport(Fast AUX-540Mb/s-standard 8b/10b)Auto detect of cable plug/unplugSource DeviceSink DeviceDisplayPort TransmitterDisplayPort ReceiverMain Link(Isochronous streams)AUX ChLink
15、/Device ManagementHot Plug Detect(Interrupt Request)FAUX:USB2.0 transport 1 unidirectional high speed lane Fixed data rate independent of display raster(refresh)Auxiliary channel for link communication and auxiliary data flow-Link Setup and Maintenance(1Mb/s-Manchester II)-Single Ended Polling detec
16、t of cable plug/unplugSingle EndedDP Technology:SpecificationsSilicon structures:Structure leveraged from PCI Express Implementable on sub 65nm process Termination Voltage must be 2volts(internal to IC)Receiver PLL BW=10MHz effective.Jitter tolerance curve specified.Data Rate 1.62 Gbs(RBR)2.7 Gbs(HB
17、R)units supporting HBR must support RBR 5.4Gbs(HBR2)units supporting HBR2 must support HBRMyDP Technology:SpecificationsSilicon structures:Structure leveraged from PCI Express Implementable on sub 65nm process Termination Voltage must be Industry richness in participation to address the transport and rendering of Display information.Testing and validation is a core component of our interoperability program and is seen as an ecosystem enabler.
